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[U-Boot] ARM926ejs: Add routines to invalidate D-Cache

Message ID 1312429550-14394-1-git-send-email-hong.xu@atmel.com
State Superseded
Headers show

Commit Message

Xu, Hong Aug. 4, 2011, 3:45 a.m. UTC
After DMA transfer, we need to maintain D-Cache coherency.
We need to clean cache (write back the dirty lines) and then
make the cache invalidate as well(hence CPU will fetch data
written by DMA controller from RAM).

Tested on AT91SAM9261EK with Peripheral DMA controller.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Tested-by: Elen Song <elen.song@atmel.com>
CC: Heiko Schocher <hs@denx.de>
CC: Albert Aribaud <albert.aribaud@free.fr>
---
 arch/arm/lib/cache.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

Comments

Albert ARIBAUD Aug. 4, 2011, 7:11 a.m. UTC | #1
Le 04/08/2011 05:45, Hong Xu a écrit :
> After DMA transfer, we need to maintain D-Cache coherency.
> We need to clean cache (write back the dirty lines) and then
> make the cache invalidate as well(hence CPU will fetch data
> written by DMA controller from RAM).
>
> Tested on AT91SAM9261EK with Peripheral DMA controller.
>
> Signed-off-by: Hong Xu<hong.xu@atmel.com>
> Tested-by: Elen Song<elen.song@atmel.com>
> CC: Heiko Schocher<hs@denx.de>
> CC: Albert Aribaud<albert.aribaud@free.fr>
> ---
>   arch/arm/lib/cache.c |   10 ++++++++++
>   1 files changed, 10 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
> index 92b61a2..216bde0 100644
> --- a/arch/arm/lib/cache.c
> +++ b/arch/arm/lib/cache.c
> @@ -53,3 +53,13 @@ void	__flush_dcache_all(void)
>   }
>   void	flush_dcache_all(void)
>   	__attribute__((weak, alias("__flush_dcache_all")));
> +
> +void __invalidate_dcache_all(void)
> +{
> +#ifdef CONFIG_ARM926EJS
> +	asm("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
> +#endif
> +	return;
> +}
> +void  invalidate_dcache_all(void)
> +	__attribute__((weak, alias("__invalidate_dcache_all")));

NAK in this form.

I don't want invalide function introduced only in full invalidation 
form, because driver code will start using this, and it is the wrong 
thing to do as each caller can only tell what it wants invalidated, not 
what other code wants invalidated; a client doing a full invalidate 
might (and certainly will, to some extent) trash other data than its own.

So please provide also an invalidate_cache() function similar to the 
flush_cache() function, with start and size arguments, that callers 
should use.

full flush and invalidate should only be used by callers that *really* 
need it (bootm comes to mind).

Amicalement,
diff mbox

Patch

diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 92b61a2..216bde0 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -53,3 +53,13 @@  void	__flush_dcache_all(void)
 }
 void	flush_dcache_all(void)
 	__attribute__((weak, alias("__flush_dcache_all")));
+
+void __invalidate_dcache_all(void)
+{
+#ifdef CONFIG_ARM926EJS
+	asm("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
+#endif
+	return;
+}
+void  invalidate_dcache_all(void)
+	__attribute__((weak, alias("__invalidate_dcache_all")));