From patchwork Tue Jun 28 14:14:36 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Schwarz X-Patchwork-Id: 102392 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id AB8BFB6F54 for ; Wed, 29 Jun 2011 00:22:06 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9DC7528117; Tue, 28 Jun 2011 16:22:04 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id I46Y7zjA1TjX; Tue, 28 Jun 2011 16:22:04 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B044928100; Tue, 28 Jun 2011 16:22:02 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 61A3B28100 for ; Tue, 28 Jun 2011 16:22:00 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qpkVSveWSrPr for ; Tue, 28 Jun 2011 16:21:59 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-fx0-f50.google.com (mail-fx0-f50.google.com [209.85.161.50]) by theia.denx.de (Postfix) with ESMTPS id E966F280FB for ; Tue, 28 Jun 2011 16:21:54 +0200 (CEST) Received: by mail-fx0-f50.google.com with SMTP id 2so197158fxh.23 for ; Tue, 28 Jun 2011 07:21:54 -0700 (PDT) Received: by 10.223.32.142 with SMTP id c14mr10656498fad.59.1309270516114; Tue, 28 Jun 2011 07:15:16 -0700 (PDT) Received: from localhost.localdomain (DSL01.212.114.252.242.ip-pool.NEFkom.net [212.114.252.242]) by mx.google.com with ESMTPS id r10sm166445fah.2.2011.06.28.07.15.14 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 28 Jun 2011 07:15:15 -0700 (PDT) From: simonschwarzcor@googlemail.com To: u-boot@lists.denx.de Date: Tue, 28 Jun 2011 16:14:36 +0200 Message-Id: <1309270480-31918-2-git-send-email-schwarz@corscience.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1309270480-31918-1-git-send-email-schwarz@corscience.de> References: <1309270480-31918-1-git-send-email-schwarz@corscience.de> Cc: Simon Schwarz Subject: [U-Boot] [1/5]devkit8000 nand_spl: armv7 support nand_spl boot X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This adds changes to armv7 files to support NAND_SPL. The execution of lowlevel init is prevented in normal u-boot. No Exeception code in SPL. board_init_f/r are replaced by board_init_spl. Much code is deactivated by defines for the SPL case. Signed-off-by: Simon Schwarz diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index d91ae12..ebbfce4 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -33,6 +33,11 @@ #include #include +/* prevent lowlevel init if this is not the preloader*/ +#if defined(CONFIG_SPL) && !defined(CONFIG_PRELOADER) +#define CONFIG_SKIP_LOWLEVEL_INIT +#endif + .globl _start _start: b reset ldr pc, _undefined_instruction @@ -43,6 +48,17 @@ _start: b reset ldr pc, _irq ldr pc, _fiq +#ifdef CONFIG_PRELOADER +/* If in Preloader don't use interrupts...*/ +_undefined_instruction: .word undefined_instruction +_software_interrupt: .word _software_interrupt +_prefetch_abort: .word _prefetch_abort +_data_abort: .word data_abort +_not_used: .word _not_used +_irq: .word _irq +_fiq: .word _fiq +_pad: .word 0x12345678 /* now 16*4=64 */ +#else _undefined_instruction: .word undefined_instruction _software_interrupt: .word software_interrupt _prefetch_abort: .word prefetch_abort @@ -51,6 +67,7 @@ _not_used: .word not_used _irq: .word irq _fiq: .word fiq _pad: .word 0x12345678 /* now 16*4=64 */ +#endif /* CONFIG_PRELOADER */ .global _end_vect _end_vect: @@ -85,6 +102,7 @@ _armboot_start: /* * These are defined in the board-specific linker script. */ +#ifndef CONFIG_PRELOADER .globl _bss_start_ofs _bss_start_ofs: .word __bss_start - _start @@ -96,6 +114,16 @@ _bss_end_ofs: .globl _end_ofs _end_ofs: .word _end - _start +#else +/* preserved the _ofs because although there is no offset */ +.globl _bss_start_ofs +_bss_start_ofs: + .word __bss_start + +.globl _bss_end_ofs +_bss_end_ofs: + .word __bss_end__ +#endif #ifdef CONFIG_USE_IRQ /* IRQ stack memory (calculated at run-time) */ @@ -153,8 +181,15 @@ next: /* the mask ROM code should have PLL and others stable */ #ifndef CONFIG_SKIP_LOWLEVEL_INIT bl cpu_init_crit -#endif - +#endif /* #ifdef CONFIG_PRELOADER */ + +#ifdef CONFIG_PRELOADER +call_board_init_spl: + ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ + ldr r0,=0x00000000 + bl board_init_spl +#else /* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) @@ -182,10 +217,8 @@ stack_setup: mov sp, r4 adr r0, _start -#ifndef CONFIG_PRELOADER cmp r0, r6 beq clear_bss /* skip relocation */ -#endif mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs add r2, r0, r3 /* r2 <- source end address */ @@ -196,7 +229,6 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_PRELOADER /* * fix .rel.dyn relocations */ @@ -248,7 +280,6 @@ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 bne clbss_l -#endif /* #ifndef CONFIG_PRELOADER */ /* * We are done. Do not return, instead branch to second part of board @@ -265,16 +296,18 @@ jump_2_ram: /* jump to it ... */ mov pc, lr -_board_init_r_ofs: - .word board_init_r - _start - _rel_dyn_start_ofs: - .word __rel_dyn_start - _start + .word __rel_dyn_start - _start _rel_dyn_end_ofs: - .word __rel_dyn_end - _start + .word __rel_dyn_end - _start _dynsym_start_ofs: - .word __dynsym_start - _start + .word __dynsym_start - _start +_board_init_r_ofs: + .word board_init_r - _start +#endif /* #ifndef CONFIG_PRELOADER */ + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT /************************************************************************* * * CPU_init_critical registers @@ -311,6 +344,8 @@ cpu_init_crit: bl lowlevel_init @ go setup pll,mux,memory mov lr, ip @ restore link mov pc, lr @ back to my caller +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + /* ************************************************************************* * @@ -437,6 +472,7 @@ cpu_init_crit: /* * exception handlers */ +#ifndef CONFIG_PRELOADER .align 5 undefined_instruction: get_bad_stack @@ -499,3 +535,14 @@ fiq: bl do_fiq #endif +#endif /* CONFIG_PRELOADER */ + +#ifdef CONFIG_PRELOADER + .align 5 +undefined_instruction: + b undefined_instruction + + .align 5 +data_abort: + b data_abort +#endif diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c index 08e6acb..ad444cb 100644 --- a/arch/arm/lib/reset.c +++ b/arch/arm/lib/reset.c @@ -44,8 +44,9 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) puts ("resetting ...\n"); udelay (50000); /* wait 50 ms */ - +#ifndef CONFIG_PRELOADER disable_interrupts(); +#endif reset_cpu(0); /*NOTREACHED*/