diff mbox

[U-Boot] BeagleBoard: Configure DVI/S-video

Message ID 1303343572-19972-27-git-send-email-jkridner@beagleboard.org
State Superseded
Delegated to: Tom Rini
Headers show

Commit Message

Jason Kridner April 20, 2011, 11:52 p.m. UTC
Based on patches from Syed Mohammed Khasim (khasim@ti.com).

Configures the output of the BeagleBoard DVI to be orange.
Configures the output of the BeagleBoard S-Video to be a colorbar.
---
Updates for this version
* Rebased on u-boot-ti.

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
---
 board/ti/beagle/beagle.c |   24 +++++++++++++
 board/ti/beagle/beagle.h |   86 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 110 insertions(+), 0 deletions(-)

Comments

Igor Grinberg April 21, 2011, 6:26 a.m. UTC | #1
On 04/21/11 02:52, Jason Kridner wrote:

> Based on patches from Syed Mohammed Khasim (khasim@ti.com).
>
> Configures the output of the BeagleBoard DVI to be orange.
> Configures the output of the BeagleBoard S-Video to be a colorbar.
> ---
> Updates for this version
> * Rebased on u-boot-ti.
>
> Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
> ---
>  board/ti/beagle/beagle.c |   24 +++++++++++++
>  board/ti/beagle/beagle.h |   86 ++++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 110 insertions(+), 0 deletions(-)
>
> diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
> index 2e27aef..69fe162 100644
> --- a/board/ti/beagle/beagle.c
> +++ b/board/ti/beagle/beagle.c
> @@ -165,6 +165,28 @@ unsigned int get_expansion_id(void)
>  }
>  
>  /*
> + * Configure DSS to display background color on DVID
> + * Configure VENC to display color bar on S-Video
> + */
> +void display_init(void)

Probably, static void display_init(void) would be better...
or even beagle_display_init... so no name space collision will occur ever...

> +{
> +	omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
> +	switch (get_board_revision()) {
> +	case REVISION_AXBX:
> +	case REVISION_CX:
> +	case REVISION_C4:
> +		omap3_dss_panel_config(&dvid_cfg);
> +		break;
> +	case REVISION_XM_A:
> +	case REVISION_XM_B:
> +	case REVISION_XM_C:
> +	default:
> +		omap3_dss_panel_config(&dvid_cfg_xm);
> +		break;
> +	}
> +}
> +
> +/*
>   * Routine: misc_init_r
>   * Description: Configure board specific parts
>   */
> @@ -311,6 +333,7 @@ int misc_init_r(void)
>  
>  	twl4030_power_init();
>  	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
> +	display_init();
>  
>  	/* Set GPIO states before they are made outputs */
>  	writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
> @@ -324,6 +347,7 @@ int misc_init_r(void)
>  		GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
>  
>  	dieid_num_r();
> +	omap3_dss_enable();
>  
>  	return 0;
>  }
> diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
> index 04247cd..18bfaa8 100644
> --- a/board/ti/beagle/beagle.h
> +++ b/board/ti/beagle/beagle.h
> @@ -23,6 +23,8 @@
>  #ifndef _BEAGLE_H_
>  #define _BEAGLE_H_
>  
> +#include <asm/arch/dss.h>
> +
>  const omap3_sysinfo sysinfo = {
>  	DDR_STACKED,
>  	"OMAP3 Beagle board",
> @@ -472,4 +474,88 @@ const omap3_sysinfo sysinfo = {
>  	MUX_VAL(CP(MMC2_DAT6),      (IDIS | PTU | EN  | M4)) /*GPIO_138 BT_EN*/\
>  	MUX_VAL(CP(MMC2_DAT7),      (IDIS | PTU | EN  | M4)) /*GPIO_139 WLAN_EN*/
>  
> +/*
> + * Display Configuration
> + */
> +
> +#define DVI_BEAGLE_ORANGE_COL		0x00FF8000
> +#define VENC_HEIGHT			0x00ef
> +#define VENC_WIDTH			0x027f
> +
> +/*
> + * Configure VENC in DSS for Beagle to generate Color Bar
> + *
> + * Kindly refer to OMAP TRM for definition of these values.
> + */
> +static const struct venc_regs venc_config_std_tv = {
> +	.status					= 0x0000001B,
> +	.f_control				= 0x00000040,
> +	.vidout_ctrl				= 0x00000000,
> +	.sync_ctrl				= 0x00008000,
> +	.llen					= 0x00008359,
> +	.flens					= 0x0000020C,
> +	.hfltr_ctrl				= 0x00000000,
> +	.cc_carr_wss_carr			= 0x043F2631,
> +	.c_phase				= 0x00000024,
> +	.gain_u					= 0x00000130,
> +	.gain_v					= 0x00000198,
> +	.gain_y					= 0x000001C0,
> +	.black_level				= 0x0000006A,
> +	.blank_level				= 0x0000005C,
> +	.x_color				= 0x00000000,
> +	.m_control				= 0x00000001,
> +	.bstamp_wss_data			= 0x0000003F,
> +	.s_carr					= 0x21F07C1F,
> +	.line21					= 0x00000000,
> +	.ln_sel					= 0x00000015,
> +	.l21__wc_ctl				= 0x00001400,
> +	.htrigger_vtrigger			= 0x00000000,
> +	.savid__eavid				= 0x069300F4,
> +	.flen__fal				= 0x0016020C,
> +	.lal__phase_reset			= 0x00060107,
> +	.hs_int_start_stop_x			= 0x008D034E,
> +	.hs_ext_start_stop_x			= 0x000F0359,
> +	.vs_int_start_x				= 0x01A00000,
> +	.vs_int_stop_x__vs_int_start_y		= 0x020501A0,
> +	.vs_int_stop_y__vs_ext_start_x		= 0x01AC0024,
> +	.vs_ext_stop_x__vs_ext_start_y		= 0x020D01AC,
> +	.vs_ext_stop_y				= 0x00000006,
> +	.avid_start_stop_x			= 0x03480079,
> +	.avid_start_stop_y			= 0x02040024,
> +	.fid_int_start_x__fid_int_start_y	= 0x0001008A,
> +	.fid_int_offset_y__fid_ext_start_x	= 0x01AC0106,
> +	.fid_ext_start_y__fid_ext_offset_y	= 0x01060006,
> +	.tvdetgp_int_start_stop_x		= 0x00140001,
> +	.tvdetgp_int_start_stop_y		= 0x00010001,
> +	.gen_ctrl				= 0x00FF0000,
> +	.output_control				= 0x0000000D,
> +	.dac_b__dac_c				= 0x00000000
> +};
> +
> +/*
> + * Configure Timings for DVI D
> + */
> +static const struct panel_config dvid_cfg = {
> +	.timing_h	= 0x0ff03f31, /* Horizantal timing */
> +	.timing_v	= 0x01400504, /* Vertical timing */
> +	.pol_freq	= 0x00007028, /* Pol Freq */
> +	.divisor	= 0x00010006, /* 72Mhz Pixel Clock */
> +	.lcd_size	= 0x02ff03ff, /* 1024x768 */
> +	.panel_type	= 0x01, /* TFT */
> +	.data_lines	= 0x03, /* 24 Bit RGB */
> +	.load_mode	= 0x02, /* Frame Mode */
> +	.panel_color	= DVI_BEAGLE_ORANGE_COL /* ORANGE */
> +};
> +
> +static const struct panel_config dvid_cfg_xm = {
> +	.timing_h	= 0x1a4024c9, /* Horizantal timing */
> +	.timing_v	= 0x02c00509, /* Vertical timing */
> +	.pol_freq	= 0x00007028, /* Pol Freq */
> +	.divisor	= 0x00010001, /* 96MHz Pixel Clock */
> +	.lcd_size	= 0x02ff03ff, /* 1024x768 */
> +	.panel_type	= 0x01, /* TFT */
> +	.data_lines	= 0x03, /* 24 Bit RGB */
> +	.load_mode	= 0x02, /* Frame Mode */
> +	.panel_color	= DVI_BEAGLE_ORANGE_COL /* ORANGE */
> +};
>  #endif
diff mbox

Patch

diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 2e27aef..69fe162 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -165,6 +165,28 @@  unsigned int get_expansion_id(void)
 }
 
 /*
+ * Configure DSS to display background color on DVID
+ * Configure VENC to display color bar on S-Video
+ */
+void display_init(void)
+{
+	omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
+	switch (get_board_revision()) {
+	case REVISION_AXBX:
+	case REVISION_CX:
+	case REVISION_C4:
+		omap3_dss_panel_config(&dvid_cfg);
+		break;
+	case REVISION_XM_A:
+	case REVISION_XM_B:
+	case REVISION_XM_C:
+	default:
+		omap3_dss_panel_config(&dvid_cfg_xm);
+		break;
+	}
+}
+
+/*
  * Routine: misc_init_r
  * Description: Configure board specific parts
  */
@@ -311,6 +333,7 @@  int misc_init_r(void)
 
 	twl4030_power_init();
 	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
+	display_init();
 
 	/* Set GPIO states before they are made outputs */
 	writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
@@ -324,6 +347,7 @@  int misc_init_r(void)
 		GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
 
 	dieid_num_r();
+	omap3_dss_enable();
 
 	return 0;
 }
diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h
index 04247cd..18bfaa8 100644
--- a/board/ti/beagle/beagle.h
+++ b/board/ti/beagle/beagle.h
@@ -23,6 +23,8 @@ 
 #ifndef _BEAGLE_H_
 #define _BEAGLE_H_
 
+#include <asm/arch/dss.h>
+
 const omap3_sysinfo sysinfo = {
 	DDR_STACKED,
 	"OMAP3 Beagle board",
@@ -472,4 +474,88 @@  const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MMC2_DAT6),      (IDIS | PTU | EN  | M4)) /*GPIO_138 BT_EN*/\
 	MUX_VAL(CP(MMC2_DAT7),      (IDIS | PTU | EN  | M4)) /*GPIO_139 WLAN_EN*/
 
+/*
+ * Display Configuration
+ */
+
+#define DVI_BEAGLE_ORANGE_COL		0x00FF8000
+#define VENC_HEIGHT			0x00ef
+#define VENC_WIDTH			0x027f
+
+/*
+ * Configure VENC in DSS for Beagle to generate Color Bar
+ *
+ * Kindly refer to OMAP TRM for definition of these values.
+ */
+static const struct venc_regs venc_config_std_tv = {
+	.status					= 0x0000001B,
+	.f_control				= 0x00000040,
+	.vidout_ctrl				= 0x00000000,
+	.sync_ctrl				= 0x00008000,
+	.llen					= 0x00008359,
+	.flens					= 0x0000020C,
+	.hfltr_ctrl				= 0x00000000,
+	.cc_carr_wss_carr			= 0x043F2631,
+	.c_phase				= 0x00000024,
+	.gain_u					= 0x00000130,
+	.gain_v					= 0x00000198,
+	.gain_y					= 0x000001C0,
+	.black_level				= 0x0000006A,
+	.blank_level				= 0x0000005C,
+	.x_color				= 0x00000000,
+	.m_control				= 0x00000001,
+	.bstamp_wss_data			= 0x0000003F,
+	.s_carr					= 0x21F07C1F,
+	.line21					= 0x00000000,
+	.ln_sel					= 0x00000015,
+	.l21__wc_ctl				= 0x00001400,
+	.htrigger_vtrigger			= 0x00000000,
+	.savid__eavid				= 0x069300F4,
+	.flen__fal				= 0x0016020C,
+	.lal__phase_reset			= 0x00060107,
+	.hs_int_start_stop_x			= 0x008D034E,
+	.hs_ext_start_stop_x			= 0x000F0359,
+	.vs_int_start_x				= 0x01A00000,
+	.vs_int_stop_x__vs_int_start_y		= 0x020501A0,
+	.vs_int_stop_y__vs_ext_start_x		= 0x01AC0024,
+	.vs_ext_stop_x__vs_ext_start_y		= 0x020D01AC,
+	.vs_ext_stop_y				= 0x00000006,
+	.avid_start_stop_x			= 0x03480079,
+	.avid_start_stop_y			= 0x02040024,
+	.fid_int_start_x__fid_int_start_y	= 0x0001008A,
+	.fid_int_offset_y__fid_ext_start_x	= 0x01AC0106,
+	.fid_ext_start_y__fid_ext_offset_y	= 0x01060006,
+	.tvdetgp_int_start_stop_x		= 0x00140001,
+	.tvdetgp_int_start_stop_y		= 0x00010001,
+	.gen_ctrl				= 0x00FF0000,
+	.output_control				= 0x0000000D,
+	.dac_b__dac_c				= 0x00000000
+};
+
+/*
+ * Configure Timings for DVI D
+ */
+static const struct panel_config dvid_cfg = {
+	.timing_h	= 0x0ff03f31, /* Horizantal timing */
+	.timing_v	= 0x01400504, /* Vertical timing */
+	.pol_freq	= 0x00007028, /* Pol Freq */
+	.divisor	= 0x00010006, /* 72Mhz Pixel Clock */
+	.lcd_size	= 0x02ff03ff, /* 1024x768 */
+	.panel_type	= 0x01, /* TFT */
+	.data_lines	= 0x03, /* 24 Bit RGB */
+	.load_mode	= 0x02, /* Frame Mode */
+	.panel_color	= DVI_BEAGLE_ORANGE_COL /* ORANGE */
+};
+
+static const struct panel_config dvid_cfg_xm = {
+	.timing_h	= 0x1a4024c9, /* Horizantal timing */
+	.timing_v	= 0x02c00509, /* Vertical timing */
+	.pol_freq	= 0x00007028, /* Pol Freq */
+	.divisor	= 0x00010001, /* 96MHz Pixel Clock */
+	.lcd_size	= 0x02ff03ff, /* 1024x768 */
+	.panel_type	= 0x01, /* TFT */
+	.data_lines	= 0x03, /* 24 Bit RGB */
+	.load_mode	= 0x02, /* Frame Mode */
+	.panel_color	= DVI_BEAGLE_ORANGE_COL /* ORANGE */
+};
 #endif