@@ -1576,7 +1576,7 @@ The following options need to be configured:
will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
- CONFIG_SYS_SPD_BUS_NUM
+ CONFIG_I2C_DEFAULT_BUS_NUM
If defined, then this indicates the I2C bus number for DDR SPD.
If not defined, then U-Boot assumes that SPD is on I2C bus 0.
@@ -2834,7 +2834,7 @@ Low Level (hardware related) configuration options:
SPD_EEPROM_ADDRESS
I2C address of the SPD EEPROM
-- CONFIG_SYS_SPD_BUS_NUM
+- CONFIG_I2C_DEFAULT_BUS_NUM
If SPD EEPROM is on an I2C bus other than the first
one, specify here. Note that the value must resolve
to something your driver can deal with.
@@ -40,7 +40,7 @@ DECLARE_GLOBAL_DATA_PTR;
#endif
#else
static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =
- CONFIG_SYS_SPD_BUS_NUM;
+ CONFIG_I2C_DEFAULT_BUS_NUM;
static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED,
CONFIG_SYS_I2C_SPEED};
@@ -475,7 +475,7 @@ phys_size_t initdram(int board_type)
*/
/* switch to correct I2C bus */
- I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
+ I2C_SET_BUS(CONFIG_I2C_DEFAULT_BUS_NUM);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
/*------------------------------------------------------------------
@@ -1048,7 +1048,7 @@ phys_size_t initdram(int board_type)
* before continuing.
*/
/* switch to correct I2C bus */
- I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
+ I2C_SET_BUS(CONFIG_I2C_DEFAULT_BUS_NUM);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
/*------------------------------------------------------------------
@@ -495,11 +495,11 @@ int mac_read_from_eeprom(void)
* This function is called before relocation, so we need to read a private
* copy of the EEPROM into a local variable on the stack.
*
- * Also, we assume that CONFIG_SYS_EEPROM_BUS_NUM == CONFIG_SYS_SPD_BUS_NUM. The global
- * variable i2c_bus_num must be compile-time initialized to CONFIG_SYS_SPD_BUS_NUM,
+ * Also, we assume that CONFIG_SYS_EEPROM_BUS_NUM == CONFIG_I2C_DEFAULT_BUS_NUM. The global
+ * variable i2c_bus_num must be compile-time initialized to CONFIG_I2C_DEFAULT_BUS_NUM,
* so that the SPD code will work. This means that all pre-relocation I2C
- * operations can only occur on the CONFIG_SYS_SPD_BUS_NUM bus. So if
- * CONFIG_SYS_EEPROM_BUS_NUM != CONFIG_SYS_SPD_BUS_NUM, then we can't read the EEPROM when
+ * operations can only occur on the CONFIG_I2C_DEFAULT_BUS_NUM bus. So if
+ * CONFIG_SYS_EEPROM_BUS_NUM != CONFIG_I2C_DEFAULT_BUS_NUM, then we can't read the EEPROM when
* this function is called. Oh well.
*/
unsigned int get_cpu_board_revision(void)
@@ -52,10 +52,10 @@ DECLARE_GLOBAL_DATA_PTR;
* runs from ROM, and we can't switch buses because we can't modify
* the global variables.
*/
-#ifndef CONFIG_SYS_SPD_BUS_NUM
-#define CONFIG_SYS_SPD_BUS_NUM 0
+#ifndef CONFIG_I2C_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUM 0
#endif
-static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = CONFIG_SYS_SPD_BUS_NUM;
+static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = CONFIG_I2C_DEFAULT_BUS_NUM;
#if defined(CONFIG_I2C_MUX)
static unsigned int i2c_bus_num_mux __attribute__ ((section ("data"))) = 0;
#endif
@@ -43,11 +43,11 @@ DECLARE_GLOBAL_DATA_PTR;
* runs from ROM, and we can't switch buses because we can't modify
* the global variables.
*/
-#ifndef CONFIG_SYS_SPD_BUS_NUM
-#define CONFIG_SYS_SPD_BUS_NUM 0
+#ifndef CONFIG_I2C_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUM 0
#endif
static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =
- CONFIG_SYS_SPD_BUS_NUM;
+ CONFIG_I2C_DEFAULT_BUS_NUM;
#endif /* CONFIG_I2C_MULTI_BUS */
static void _i2c_bus_reset(void)
@@ -166,7 +166,7 @@ void i2c_init(int speed, int slaveaddr)
}
/* set to SPD bus as default bus upon powerup */
- I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
+ I2C_SET_BUS(CONFIG_I2C_DEFAULT_BUS_NUM);
}
/*
@@ -178,7 +178,7 @@
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_I2C_MULTI_BUS 1
-#define CONFIG_SYS_SPD_BUS_NUM 0
+#define CONFIG_I2C_DEFAULT_BUS_NUM 0
#define IIC1_MCP3021_ADDR 0x4d
#define IIC1_USB2507_ADDR 0x2c
#ifdef CONFIG_I2C_MULTI_BUS
@@ -103,7 +103,7 @@
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_OFFSET 0x3000
#define CONFIG_SYS_I2C2_OFFSET 0x3100
-#define CONFIG_SYS_SPD_BUS_NUM 1 /* The I2C bus for SPD */
+#define CONFIG_I2C_DEFAULT_BUS_NUM 1 /* The I2C bus for SPD */
#define CONFIG_SYS_RTC_BUS_NUM 1 /* The I2C bus for RTC */
#define CONFIG_SYS_I2C_8574_ADDR1 0x20 /* I2C1, PCF8574 */
@@ -163,7 +163,7 @@
/* I2C addresses of SPD EEPROMs */
#define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */
-#define CONFIG_SYS_SPD_BUS_NUM 1
+#define CONFIG_I2C_DEFAULT_BUS_NUM 1
/* These are used when DDR doesn't use SPD. */
#define CONFIG_SYS_SDRAM_SIZE 256 /* DDR is 256MB */
@@ -148,7 +148,7 @@
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
/* I2C addresses of SPD EEPROMs */
-#define CONFIG_SYS_SPD_BUS_NUM 1 /* SPD EEPROMS locate on I2C bus 1 */
+#define CONFIG_I2C_DEFAULT_BUS_NUM 1 /* SPD EEPROMS locate on I2C bus 1 */
#define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */
#define SPD_EEPROM_ADDRESS2 0x52 /* CTLR 1 DIMM 0 */
@@ -86,7 +86,7 @@
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
/* I2C addresses of SPD EEPROMs */
-#define CONFIG_SYS_SPD_BUS_NUM 1
+#define CONFIG_I2C_DEFAULT_BUS_NUM 1
#define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */
/*
@@ -127,7 +127,7 @@
/* I2C addresses of SPD EEPROMs */
#define CONFIG_DDR_SPD
-#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD EEPROM located on I2C bus 0 */
+#define CONFIG_I2C_DEFAULT_BUS_NUM 0 /* SPD EEPROM located on I2C bus 0 */
#define SPD_EEPROM_ADDRESS1 0x51 /* CTLR 0 DIMM 0 */
/* These are used when DDR doesn't use SPD. */
@@ -137,7 +137,7 @@
#define CONFIG_DDR_SPD
#define CONFIG_FSL_DDR3
-#define CONFIG_SYS_SPD_BUS_NUM 1
+#define CONFIG_I2C_DEFAULT_BUS_NUM 1
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
@@ -141,7 +141,7 @@
* I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
* the first internal I2C controller of the PPC440EPx
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_SPD_BUS_NUM 0
+#define CONFIG_I2C_DEFAULT_BUS_NUM 0
#define CONFIG_IPADDR 172.25.1.14
@@ -141,7 +141,7 @@
* I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
* the second internal I2C controller of the PPC440EPx
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_SPD_BUS_NUM 1
+#define CONFIG_I2C_DEFAULT_BUS_NUM 1
/* Setup some board specific values for the default environment variables */
#define CONFIG_IPADDR 172.25.1.15
@@ -123,7 +123,7 @@
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */
+#define CONFIG_I2C_DEFAULT_BUS_NUM 0 /* The I2C bus for SPD */
#define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
@@ -122,7 +122,7 @@
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */
+#define CONFIG_I2C_DEFAULT_BUS_NUM 0 /* The I2C bus for SPD */
#define IIC0_BOOTPROM_ADDR 0x50
#define IIC0_ALT_BOOTPROM_ADDR 0x54
@@ -141,7 +141,7 @@
* I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
* the first internal I2C controller of the PPC440EPx
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_SPD_BUS_NUM 0
+#define CONFIG_I2C_DEFAULT_BUS_NUM 0
/* Setup some board specific values for the default environment variables */
#define CONFIG_IPADDR 172.25.1.25
@@ -290,7 +290,7 @@
#define CONFIG_SYS_I2C1_OFFSET 0x3000
#define CONFIG_SYS_I2C2_OFFSET 0x3100
#define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C2_OFFSET
-/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */
+/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_I2C_DEFAULT_BUS_NUM... */
/* TSEC */
#define CONFIG_SYS_TSEC1_OFFSET 0x24000
@@ -221,7 +221,7 @@
#define CONFIG_SYS_I2C1_OFFSET 0x3000
#define CONFIG_SYS_I2C2_OFFSET 0x3100
#define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C1_OFFSET
-/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */
+/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_I2C_DEFAULT_BUS_NUM... */
#define CONFIG_SYS_I2C_8574_ADDR2 0x20 /* I2C1, PCF8574 */
@@ -65,8 +65,8 @@
#if !defined(CONFIG_SYS_DTT_BUS_NUM)
#define CONFIG_SYS_DTT_BUS_NUM 0
#endif
-#if !defined(CONFIG_SYS_SPD_BUS_NUM)
-#define CONFIG_SYS_SPD_BUS_NUM 0
+#if !defined(CONFIG_I2C_DEFAULT_BUS_NUM)
+#define CONFIG_I2C_DEFAULT_BUS_NUM 0
#endif
#ifndef I2C_SOFT_DECLARATIONS