diff mbox

[U-Boot,10/13] update/fix AcTux4 board

Message ID 1294062338-21084-11-git-send-email-michael@schwingen.org
State Superseded
Headers show

Commit Message

Michael Schwingen Jan. 3, 2011, 1:45 p.m. UTC
Signed-off-by: Michael Schwingen <michael@schwingen.org>
---
 board/actux4/actux4.c    |   12 +++++++-----
 board/actux4/config.mk   |    6 ++----
 include/configs/actux4.h |   22 +++++++++++++++++-----
 3 files changed, 26 insertions(+), 14 deletions(-)
diff mbox

Patch

diff --git a/board/actux4/actux4.c b/board/actux4/actux4.c
index f373b58..f66acd8 100644
--- a/board/actux4/actux4.c
+++ b/board/actux4/actux4.c
@@ -42,6 +42,12 @@ 
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int board_early_init_f (void)
+{
+	*IXP425_EXP_CS1 = 0xbd113c42;
+	return 0;
+}
+
 int board_init (void)
 {
 	gd->bd->bi_arch_number = MACH_TYPE_ACTUX4;
@@ -88,8 +94,6 @@  int board_init (void)
 	GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK);
 	GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK);
 
-	*IXP425_EXP_CS1 = 0xbd113c42;
-
 	udelay (10000);
 	GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
 	udelay (10000);
@@ -109,9 +113,7 @@  int checkboard (void)
 
 int dram_init (void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
+	gd->ram_size = PHYS_SDRAM_1_SIZE;
 	return (0);
 }
 
diff --git a/board/actux4/config.mk b/board/actux4/config.mk
index 9cb838b..be871c1 100644
--- a/board/actux4/config.mk
+++ b/board/actux4/config.mk
@@ -1,4 +1,2 @@ 
-CONFIG_SYS_TEXT_BASE = 0x00e00000
-
-# include NPE ethernet driver
-BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o
+PLATFORM_RELFLAGS += -ffunction-sections 
+PLATFORM_LDFLAGS += --gc-sections
diff --git a/include/configs/actux4.h b/include/configs/actux4.h
index 04145c3..ac7d1ba 100644
--- a/include/configs/actux4.h
+++ b/include/configs/actux4.h
@@ -37,6 +37,7 @@ 
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_BOOTDELAY		3
 #define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
+#define CONFIG_BOARD_EARLY_INIT_F	1
 
 /***************************************************************
  * U-boot generic defines start here.
@@ -45,7 +46,6 @@ 
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 128*1024)
-/* size in bytes reserved for initial data */
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
@@ -82,8 +82,9 @@ 
 #define CONFIG_SYS_MEMTEST_START		0x00400000
 #define CONFIG_SYS_MEMTEST_END			0x00800000
 
-/* spec says 66.666 MHz, but it appears to be 33 */
-#define CONFIG_SYS_HZ				3333333
+/* timer clock - 2* OSC_IN system clock */
+#define CONFIG_IXP425_TIMER_CLK                 66000000
+#define CONFIG_SYS_HZ				1000
 
 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR			0x00010000
@@ -109,7 +110,7 @@ 
 /* SDRAM settings */
 #define CONFIG_NR_DRAM_BANKS		1
 #define PHYS_SDRAM_1			0x00000000
-#define CONFIG_SYS_DRAM_BASE			0x00000000
+#define CONFIG_SYS_SDRAM_BASE			0x00000000
 
 /* 32MB SDRAM */
 #define CONFIG_SYS_SDR_CONFIG			0x18
@@ -119,6 +120,7 @@ 
 #define CONFIG_SYS_DRAM_SIZE			0x02000000
 
 /* FLASH organization */
+#define CONFIG_SYS_TEXT_BASE		0x50000000
 #define CONFIG_SYS_MAX_FLASH_BANKS		2
 /* max # of sectors per chip */
 #define CONFIG_SYS_MAX_FLASH_SECT		70
@@ -153,6 +155,7 @@ 
 #define	CONFIG_PHY_ADDR			0x1C
 /* MII PHY management */
 #define CONFIG_MII			1
+
 /* Number of ethernet rx buffers & descriptors */
 #define CONFIG_SYS_RX_ETH_BUFFER		16
 
@@ -181,19 +184,24 @@ 
 	"mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);"			\
 	"IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0"		\
 	"kerneladdr=51020000\0"						\
+	"kernelfile=actux4/uImage\0"					\
+	"rootfile=actux4/rootfs\0"					\
 	"rootaddr=51160000\0"						\
 	"loadaddr=10000\0"						\
 	"updateboot_ser=mw.b 10000 ff 40000;"				\
 	" loady ${loadaddr};"						\
 	" run eraseboot writeboot\0"					\
 	"updateboot_net=mw.b 10000 ff 40000;"				\
-	" tftp ${loadaddr} u-boot.bin;"					\
+	" tftp ${loadaddr} actux4/u-boot.bin;"					\
 	" run eraseboot writeboot\0"					\
 	"eraseboot=protect off 50000000 5003efff;"			\
 	" erase 50000000 +${filesize}\0"				\
 	"writeboot=cp.b 10000 50000000 ${filesize}\0"			\
 	"eraseenv=protect off 5003f000 5003ffff;"			\
 	" erase 5003f000 5003ffff\0"					\
+	"updateucode=loady;"						\
+	" era ${npe_ucode} +${filesize};"				\
+	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"			\
 	"updateroot=tftp ${loadaddr} ${rootfile};"			\
 	" era ${rootaddr} +${filesize};"				\
 	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0"			\
@@ -212,4 +220,8 @@ 
 	" tftpboot ${loadaddr} ${kernelfile};"				\
 	" bootm\0"
 
+/* additions for new relocation code, must be added to all boards */
+#define CONFIG_SYS_INIT_SP_ADDR        \
+	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
 #endif /* __CONFIG_H */