From patchwork Sat Apr 18 10:00:00 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Christophe PLAGNIOL-VILLARD X-Patchwork-Id: 71660 X-Patchwork-Delegate: s-paulraj@ti.com Return-Path: X-Original-To: wd@gemini.denx.de Delivered-To: wd@gemini.denx.de Received: from diddl.denx.de (diddl.denx.de [10.0.0.6]) by gemini.denx.de (Postfix) with ESMTP id B317D83420E8 for ; Sat, 18 Apr 2009 12:26:18 +0200 (CEST) Received: from diddl.denx.de (localhost.localdomain [127.0.0.1]) by diddl.denx.de (Postfix) with ESMTP id 86B2AC91318B for ; Sat, 18 Apr 2009 12:26:18 +0200 (CEST) Received: from pop.mnet-online.de by diddl.denx.de with POP3 (fetchmail-6.3.8) for (single-drop); Sat, 18 Apr 2009 12:26:18 +0200 (CEST) Received: from murder (svr19.m-online.net [192.168.3.147]) by backend2 (Cyrus v2.2.12) with LMTPA; Sat, 18 Apr 2009 12:25:46 +0200 X-Sieve: CMU Sieve 2.2 Received: from mail.m-online.net (localhost [127.0.0.1]) by frontend3.pop.m-online.net (Cyrus v2.2.13) with LMTPA; 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Sat, 18 Apr 2009 12:25:36 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B3AC128098 for ; Sat, 18 Apr 2009 12:25:33 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id RMrFNZz1oOJh for ; Sat, 18 Apr 2009 12:25:32 +0200 (CEST) Received: from 30.mail-out.ovh.net (30.mail-out.ovh.net [213.186.62.213]) by theia.denx.de (Postfix) with SMTP id 07F5C28096 for ; Sat, 18 Apr 2009 12:25:29 +0200 (CEST) Received: (qmail 24547 invoked by uid 503); 18 Apr 2009 10:25:43 -0000 Received: from b7.ovh.net (HELO mail153.ha.ovh.net) (213.186.33.57) by 30.mail-out.ovh.net with SMTP; 18 Apr 2009 10:25:43 -0000 Received: from b0.ovh.net (HELO queue-out) (213.186.33.50) by b0.ovh.net with SMTP; 18 Apr 2009 10:25:33 -0000 Received: from ns32433.ovh.net (HELO localhost) (plagnioj%jcrosoft.com@213.251.161.87) by ns0.ovh.net with SMTP; 18 Apr 2009 10:25:31 -0000 From: Jean-Christophe PLAGNIOL-VILLARD To: u-boot@lists.denx.de Date: Sat, 18 Apr 2009 12:00:00 +0200 Message-Id: <1240048800-11079-1-git-send-email-plagnioj@jcrosoft.com> X-Mailer: git-send-email 1.6.2.1 X-Ovh-Tracer-Id: 12293419609344289562 X-Ovh-Remote: 213.251.161.87 (ns32433.ovh.net) X-Ovh-Local: 213.186.33.20 (ns0.ovh.net) X-Spam-Check: DONE|H 0.5/N Cc: Richard Woodruff Subject: [U-Boot] [PATCH] omap2420h4: move arch pre lowlevel init to board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de X-Virus-Scanned: by amavisd-new at m-online.net Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Cc: Richard Woodruff --- board/omap2420h4/lowlevel_init.S | 23 +++++++++++++++++++++++ cpu/arm1136/start.S | 20 +++----------------- include/configs/omap2420h4.h | 1 + 3 files changed, 27 insertions(+), 17 deletions(-) diff --git a/board/omap2420h4/lowlevel_init.S b/board/omap2420h4/lowlevel_init.S index 9752fc4..e017e1e 100644 --- a/board/omap2420h4/lowlevel_init.S +++ b/board/omap2420h4/lowlevel_init.S @@ -158,6 +158,29 @@ pll_div_add: pll_div_val: .word DPLL_VAL /* DPLL setting (300MHz default) */ +.global board_pre_lowlevel_init +board_pre_lowlevel_init: + /* Copy vectors to mask ROM indirect addr */ + add r0, r0, #4 /* skip reset vector */ + mov r2, #64 /* r2 <- size to copy */ + add r2, r0, r2 /* r2 <- source end address */ + mov r1, #SRAM_OFFSET0 /* build vect addr */ + mov r3, #SRAM_OFFSET1 + add r1, r1, r3 + mov r3, #SRAM_OFFSET2 + add r1, r1, r3 +next: + ldmia r0!, {r3-r10} /* copy from source address [r0] */ + stmia r1!, {r3-r10} /* copy to target address [r1] */ + cmp r0, r2 /* until source end address [r2] */ + bne next /* loop until equal */ + mov ip, lr /* save link reg across call */ + bl cpy_clk_code /* put dpll adjust code behind vectors */ + mov lr, ip /* restore link reg */ + + /* the mask ROM code should have PLL and others stable */ + mov pc, lr + .globl lowlevel_init lowlevel_init: ldr sp, SRAM_STACK diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S index e622338..05220ed 100644 --- a/cpu/arm1136/start.S +++ b/cpu/arm1136/start.S @@ -128,25 +128,11 @@ reset: orr r0,r0,#0xd3 msr cpsr,r0 -#ifdef CONFIG_OMAP2420H4 - /* Copy vectors to mask ROM indirect addr */ +#ifdef CONFIG_BOARD_PRE_LOWLEVEL_INIT adr r0, _start /* r0 <- current position of code */ - add r0, r0, #4 /* skip reset vector */ - mov r2, #64 /* r2 <- size to copy */ - add r2, r0, r2 /* r2 <- source end address */ - mov r1, #SRAM_OFFSET0 /* build vect addr */ - mov r3, #SRAM_OFFSET1 - add r1, r1, r3 - mov r3, #SRAM_OFFSET2 - add r1, r1, r3 -next: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - bne next /* loop until equal */ - bl cpy_clk_code /* put dpll adjust code behind vectors */ + bl board_pre_lowlevel_init #endif - /* the mask ROM code should have PLL and others stable */ + #ifndef CONFIG_SKIP_LOWLEVEL_INIT bl cpu_init_crit #endif diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 1803b13..5683b3a 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -37,6 +37,7 @@ #define CONFIG_OMAP2420H4 1 /* and on a H4 board */ /*#define CONFIG_APTIX 1 #* define if on APTIX test chip */ /*#define CONFIG_VIRTIO 1 #* Using Virtio simulator */ +#define CONFIG_BOARD_PRE_LOWLEVEL_INIT /* Clock config to target*/ #define PRCM_CONFIG_II 1