Show patches with: Series = RISC-V SiFive FU540 support SPL       |    Archived = No       |   21 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v8,21/21] doc: sifive: fu540: Add description for OpenSBI generic platform RISC-V SiFive FU540 support SPL - - - - --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,20/21] riscv: sifive: fu540: enable all cache ways from U-Boot proper RISC-V SiFive FU540 support SPL - - 1 - --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,19/21] sifive: dts: fu540: Enable L2 Cache in U-Boot RISC-V SiFive FU540 support SPL - - 1 - --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,18/21] configs: fu540: Add config options for U-Boot SPL RISC-V SiFive FU540 support SPL - - 1 - --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,17/21] sifive: fu540: Add U-Boot proper sector start RISC-V SiFive FU540 support SPL - - 2 - --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,16/21] sifive: fu540: Add sample SD gpt partition layout RISC-V SiFive FU540 support SPL - - 2 - --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,15/21] riscv: sifive: fu540: add SPL configuration RISC-V SiFive FU540 support SPL - - 2 1 --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,14/21] riscv: Add place-holder for driver compilation RISC-V SiFive FU540 support SPL - - 1 1 --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,13/21] riscv: cpu: fu540: Add support for cpu fu540 RISC-V SiFive FU540 support SPL - - 1 - --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,12/21] riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux RISC-V SiFive FU540 support SPL - - 1 - --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,11/21] clk: sifive: fu540-prci: Add ehternet clock initialization in SPL RISC-V SiFive FU540 support SPL - - - - --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,10/21] clk: sifive: fu540-prci: Add ddr clock initialization in SPL RISC-V SiFive FU540 support SPL - - - - --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,09/21] clk: sifive: fu540-prci: Add clock enable and disable ops RISC-V SiFive FU540 support SPL - - 1 1 --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,08/21] riscv: sifive: dts: fu540: add U-Boot dmc node RISC-V SiFive FU540 support SPL - - 1 1 --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,07/21] sifive: dts: fu540: Add DDR controller and phy register settings RISC-V SiFive FU540 support SPL - - - 1 --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,06/21] sifive: fu540: add ddr driver RISC-V SiFive FU540 support SPL - - 2 1 --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,05/21] riscv: sifive: dts: fu540: Add board -u-boot.dtsi files RISC-V SiFive FU540 support SPL - - 3 1 --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,04/21] lib: Makefile: build crc7.c when CONFIG_MMC_SPI RISC-V SiFive FU540 support SPL - - - - --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,03/21] riscv: Add _image_binary_end for SPL RISC-V SiFive FU540 support SPL - - 3 1 --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,02/21] riscv: sifive: fu540: Use OTP DM driver for serial environment variable RISC-V SiFive FU540 support SPL - - 1 1 --- 2020-05-09 Pragnesh Patel Andes Superseded
[v8,01/21] misc: add driver for the SiFive otp controller RISC-V SiFive FU540 support SPL - - 1 1 --- 2020-05-09 Pragnesh Patel Andes Superseded