From patchwork Tue Jan 18 07:27:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Aswath Govindraju X-Patchwork-Id: 1581118 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=E3XDegIF; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JdL46501Wz9sXM for ; Tue, 18 Jan 2022 18:28:54 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 29C8A837CC; Tue, 18 Jan 2022 08:28:44 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="E3XDegIF"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id CEAA7831E9; Tue, 18 Jan 2022 08:28:38 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 2C34A83102 for ; Tue, 18 Jan 2022 08:28:31 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=a-govindraju@ti.com Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 20I7SF9V018428; Tue, 18 Jan 2022 01:28:15 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1642490895; bh=BePfYOjG7MYYoGvZe3IQzVdOCN5g5AShdaW94SvKx4o=; h=From:To:CC:Subject:Date; b=E3XDegIF/GF4RBWRbiRWtFIWDfLatm7mMkvBBKrxnO2G1NSZM3wIo0uLvTH3h6g8L Vygy5IGhc2Q17JFwkTTGGnrCS8yliB4jYPrJhj6VQAC+43qtuJ8ys+ILGqTg5k/JIv OUx8tUFw4SRu0XqaY93VlemulTVPw1ElsdnLuNF0= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 20I7SF5M050598 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 18 Jan 2022 01:28:15 -0600 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Tue, 18 Jan 2022 01:28:14 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Tue, 18 Jan 2022 01:28:14 -0600 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 20I7S7pZ100474; Tue, 18 Jan 2022 01:28:08 -0600 From: Aswath Govindraju To: CC: Aswath Govindraju , Lukasz Majewski , Sean Anderson , Jaehoon Chung , Simon Glass , Fabio Estevam , Andre Przywara , Jagan Teki , Kever Yang , Tim Harvey , Christian Hewitt , Peter Robinson , Dave Gerlach , David Huang , Keerthy , Hari Nagalla , Nishanth Menon , Tero Kristo , Suman Anna , Vignesh Raghavendra , Wolfgang Denk , Kishon Vijay Abraham I , Tom Rini , Subject: [PATCH v3 00/20] J721S2: Add initial support Date: Tue, 18 Jan 2022 12:57:47 +0530 Message-ID: <20220118072807.11586-1-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean The J721S2 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration in automotive ADAS applications and industrial applications requiring AI at the network edge. This SoC extends the Jacinto 7 family of SoCs with focus on lowering system costs and power while providing interfaces, memory architecture and compute performance for single and multi-sensor applications. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, three clusters of lockstep capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA), C7x floating point Vector DSP. * 3D GPU: Automotive grade IMG BXS-4-64 * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC) * Two CSI2.0 4L RX plus one eDP/DP, two DSI Tx, and one DPI interface. * Two Ethernet ports with RGMII support. * Single 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role device subsystems, * Up to 20 MCANs, 5 McASP, eMMC and SD, OSPI/HyperBus memory controller, QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals. * Hardware accelerator blocks containing AES/DES/SHA/MD5 called SA2UL management. * Chips and Media Wave521CL H.264/H.265 encode/decode engine See J721S2 Technical Reference Manual (SPRUJ28 – NOVEMBER 2021) for further details: http://www.ti.com/lit/pdf/spruj28 bootlog: - https://pastebin.ubuntu.com/p/8FfVJjVVSC/ Notes: - Patches 12, 13, 14, 15 and 16 are synced from upstream kernel v5.17-rc1 tag Changes since v2: - Removed the redundant config K3_J721S2_DDRSS and instead used K3_J721E_DDRSS - Formatted the Kconfig files to remove extra lines - Added dts files in the MAINTAINERS baord folder Changes since v1: - Removed unused serial aliases - Assigned serial2 alias for main uart8 instance - Moved aliases to respective board files Aswath Govindraju (10): ram: k3-ddrss: lpddr4_structs_if.h: Add a pointer to ddr instance ram: k3-ddrss: Add support for multiple instances of DDR subsystems ram: k3-ddrss: Add support for configuring MSMC subsystem in case of Multiple DDR subsystems dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2 arm: dts: Add initial support for J721S2 SoC arm: dts: Add initial support for J721S2 System on Module arm: dts: Add support for A72 specific J721S2 Common Processor Board arm: dts: k3-j721s2: Add r5 specific dt support arm: dts: k3-j721s2-ddr: Add DDR support David Huang (9): arm: K3: Add basic support for J721S2 SoC definition drivers: dma: Add support for J721S2 clk: clk-k3: Add support for J721S2 SoC power: domain: ti: Add support for J721S2 SoC ram: k3-ddrss: Add support for J721S2 SoC soc: ti: k3-socinfo: Add entry for J721S2 SoC board: ti: j721s2: Add board support for J721S2 configs: j721s2_evm_r5_defconfig: Add R5 SPL specific defconfig configs: j721s2_evm_a72_defconfig: Add A72 specific defconfig Nishanth Menon (1): remoteproc: k3_system_controller: Support optional boot_notification channel arch/arm/dts/Makefile | 2 + .../k3-j721s2-common-proc-board-u-boot.dtsi | 149 + arch/arm/dts/k3-j721s2-common-proc-board.dts | 430 ++ arch/arm/dts/k3-j721s2-ddr-evm-lp4-4266.dtsi | 4387 ++++++++++++++++ arch/arm/dts/k3-j721s2-ddr.dtsi | 4440 +++++++++++++++++ arch/arm/dts/k3-j721s2-main.dtsi | 937 ++++ arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi | 302 ++ .../dts/k3-j721s2-r5-common-proc-board.dts | 198 + arch/arm/dts/k3-j721s2-som-p0.dtsi | 173 + arch/arm/dts/k3-j721s2.dtsi | 167 + arch/arm/mach-k3/Kconfig | 15 +- arch/arm/mach-k3/Makefile | 1 + arch/arm/mach-k3/arm64-mmu.c | 53 + arch/arm/mach-k3/include/mach/hardware.h | 4 + .../mach-k3/include/mach/j721s2_hardware.h | 60 + arch/arm/mach-k3/include/mach/j721s2_spl.h | 46 + arch/arm/mach-k3/include/mach/spl.h | 4 + arch/arm/mach-k3/j721s2/Makefile | 5 + arch/arm/mach-k3/j721s2/clk-data.c | 403 ++ arch/arm/mach-k3/j721s2/dev-data.c | 85 + arch/arm/mach-k3/j721s2_init.c | 312 ++ board/ti/j721s2/Kconfig | 63 + board/ti/j721s2/MAINTAINERS | 16 + board/ti/j721s2/Makefile | 8 + board/ti/j721s2/evm.c | 180 + configs/j721s2_evm_a72_defconfig | 207 + configs/j721s2_evm_r5_defconfig | 171 + .../remoteproc/k3-system-controller.txt | 3 + drivers/clk/ti/clk-k3.c | 5 + drivers/dma/ti/Makefile | 1 + drivers/dma/ti/k3-psil-j721s2.c | 167 + drivers/dma/ti/k3-psil-priv.h | 1 + drivers/dma/ti/k3-psil.c | 2 + drivers/firmware/ti_sci_static_data.h | 40 +- drivers/power/domain/ti-power-domain.c | 5 + drivers/ram/Kconfig | 2 +- drivers/ram/k3-ddrss/k3-ddrss.c | 296 +- drivers/ram/k3-ddrss/lpddr4_structs_if.h | 1 + drivers/remoteproc/k3_system_controller.c | 20 +- drivers/soc/soc_ti_k3.c | 4 + include/configs/j721s2_evm.h | 191 + include/dt-bindings/mux/ti-serdes.h | 22 + include/dt-bindings/pinctrl/k3.h | 3 + include/k3-clk.h | 1 + include/k3-dev.h | 1 + 45 files changed, 13522 insertions(+), 61 deletions(-) create mode 100644 arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi create mode 100644 arch/arm/dts/k3-j721s2-common-proc-board.dts create mode 100644 arch/arm/dts/k3-j721s2-ddr-evm-lp4-4266.dtsi create mode 100644 arch/arm/dts/k3-j721s2-ddr.dtsi create mode 100644 arch/arm/dts/k3-j721s2-main.dtsi create mode 100644 arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi create mode 100644 arch/arm/dts/k3-j721s2-r5-common-proc-board.dts create mode 100644 arch/arm/dts/k3-j721s2-som-p0.dtsi create mode 100644 arch/arm/dts/k3-j721s2.dtsi create mode 100644 arch/arm/mach-k3/include/mach/j721s2_hardware.h create mode 100644 arch/arm/mach-k3/include/mach/j721s2_spl.h create mode 100644 arch/arm/mach-k3/j721s2/Makefile create mode 100644 arch/arm/mach-k3/j721s2/clk-data.c create mode 100644 arch/arm/mach-k3/j721s2/dev-data.c create mode 100644 arch/arm/mach-k3/j721s2_init.c create mode 100644 board/ti/j721s2/Kconfig create mode 100644 board/ti/j721s2/MAINTAINERS create mode 100644 board/ti/j721s2/Makefile create mode 100644 board/ti/j721s2/evm.c create mode 100644 configs/j721s2_evm_a72_defconfig create mode 100644 configs/j721s2_evm_r5_defconfig create mode 100644 drivers/dma/ti/k3-psil-j721s2.c create mode 100644 include/configs/j721s2_evm.h