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bh=kDV6IU9eI3Atvyn4qqLV398s3TRz5aVC1dKV/XU20cM=; b=Hf6DnyWLEgHOnNqAgEFF0/6gAoJFAET3NO5AgmDr6ur30BADE2HYffVMoDS3iFLIFG 67+2IdgSJ5lrPWLhNdrct/3cvS1tFjtzhY9e0fdpe/ACitPaLY+ytby5M37wgWHZTwl7 MXBfy9dH+qMDhpkXjkkixsWg/Age8FOre4a2zyHhsFkVvgzjOyxv6UeaanXaa7PedWJc 0OnyfSXD7eUk2Z9ahRlUTX1X5FXF+fb+eHc/w2WgHs+jCEbi3dBiegWg40X8AissnmjE DMI+g7oauIWqkSoScjOsmZEZN0Q+5JaNYvGILSf+AW9j6ZmIpjLlnS328MCr7cHRhGWv fEXQ== X-Gm-Message-State: AOAM533uvQb2sVcH1hFj0PDsSf5lDksPukM3G1wnB/CMg/pWhLpQNU6R VldCXMF/lkwVdlJyj0omto7+K7u0EWI= X-Google-Smtp-Source: ABdhPJzcxbV9uV+aMWrzdnmQ9KwRrJsAukftWPBfNb8zpxkkHJ5tDyZu5FHhATyPxNipQCMlYLrCSA== X-Received: by 2002:a17:906:b1da:: with SMTP id bv26mr3704452ejb.26.1641908389120; Tue, 11 Jan 2022 05:39:49 -0800 (PST) Received: from localhost.localdomain ([178.233.26.119]) by smtp.gmail.com with ESMTPSA id ck3sm1180324edb.36.2022.01.11.05.39.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Jan 2022 05:39:48 -0800 (PST) From: Alper Nebi Yasak To: u-boot@lists.denx.de Cc: Yifeng Zhao , Peng Fan , Ashok Reddy Soma , Samuel Dionne-Riel , Aswath Govindraju , Philipp Tomsich , Jagan Teki , Stephen Carlson , Akash Gajjar , Michal Simek , Kever Yang , Faiz Abbas , Simon Glass , Peter Robinson , Jaehoon Chung , Jack Mitchell , Alper Nebi Yasak Subject: [PATCH v2 0/4] rockchip: sdhci: Fix reinit and add HS400 Enhanced Strobe support Date: Tue, 11 Jan 2022 16:39:27 +0300 Message-Id: <20220111133931.7866-1-alpernebiyasak@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean My rk3399-gru-kevin has some problems with the eMMC. The board can boot to U-Boot proper with the eMMC working at a low speed, but trying to reinitialize it with "mmc dev 0" or "mmc rescan" makes it unusable. If the HS400 mode is enabled, it times out while executing tuning and doesn't even start at a working state. To work around these errors, I had implemented support for the HS400 Enhanced Strobe mode as the first version of this series. I have also managed the fix the issue above (related to power-cycling the eMMC PHY), which exposed another one with this series: reinitialization at lower speeds fail if the ES bit is set. Since fixing that needed changes to this series I decided to send the previous fix as part of this instead of as an independent patch. To test, I'm building with the following configs enabled: +CONFIG_MMC_SPEED_MODE_SET=y [...] CONFIG_MMC_PWRSEQ=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y and running roughly: $ mmc rescan [0|1|3|10|11|12] $ mmc info $ mmc part $ load mmc 0:1 0xd0000000 256MiB.bin $ load mmc 0:1 0xd0000000 16MiB.bin $ load mmc 0:1 0xd0000000 8MiB.bin I used to test by loading different sizes from a very big file (~7GiB), but that's slower than reading fixed-size files for some reason I don't know. I thought loading full files would be a better test so I switched to those. Here's the differences in info and speeds I get with this: Mode | Bus Speed | Bus Width -----------------------+--------------+-------------- MMC Legacy | 25000000 | 8-bit MMC High Speed (26MHz) | 26000000 | 8-bit MMC High Speed (52MHz) | 52000000 | 8-bit HS200 (200MHz) | 200000000 | 8-bit HS400 (200MHz) | 200000000 | 8-bit DDR HS400ES (200MHz) | 200000000 | 8-bit DDR Mode | 256 MiB Load | 16 MiB Load | 8 MiB Load -----------------------+--------------+--------------+-------------- MMC Legacy | ~22.1 MiB/s | ~21.9 MiB/s | ~21.6 MiB/s MMC High Speed (26MHz) | ~22.1 MiB/s | ~21.9 MiB/s | ~21.6 MiB/s MMC High Speed (52MHz) | ~43.7 MiB/s | ~42.8 MiB/s | ~41.7 MiB/s HS200 (200MHz) | ~161.2 MiB/s | ~149.5 MiB/s | ~137.9 MiB/s HS400 (200MHz) | ~254.5 MiB/s | ~235.3 MiB/s | ~216.2 MiB/s HS400ES (200MHz) | ~254.7 MiB/s | ~238.8 MiB/s | ~216.2 MiB/s Hope I haven't missed anything. Enabling the configs above for each board is left to board maintainers as I can't test on those boards. As an aside, I want to further clean up this driver when I have the time (it's a weird combination of what could be three different drivers), but wanted to send this as it at least gets the driver to a working state. Changes in v2: - Add patch to fix PHY power cycling at higher speeds - Unset ES bit in rk3399 set_control_reg() to fix a reinit issue - Don't use unnecessary & for function pointer in ops struct - Rename rk3399_set_enhanced_strobe -> rk3399_sdhci_set_enhanced_strobe - Rename rk3568_set_enhanced_strobe -> rk3568_sdhci_set_enhanced_strobe - Let set_enhanced_strobe() unset the ES bit if mode is not HS400_ES - Rewrote cover letter v1: https://patchwork.ozlabs.org/project/uboot/list/?series=269768 Alper Nebi Yasak (4): mmc: sdhci: Add HS400 Enhanced Strobe support rockchip: sdhci: Fix RK3399 eMMC PHY power cycling rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399 rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568 drivers/mmc/rockchip_sdhci.c | 121 ++++++++++++++++++++++++++++++++--- drivers/mmc/sdhci.c | 18 ++++++ include/sdhci.h | 1 + 3 files changed, 130 insertions(+), 10 deletions(-)