From patchwork Fri Oct 22 08:56:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Padmarao Begari X-Patchwork-Id: 1544848 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=FJuSzZj7; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HbJCx1yGDz9sRN for ; Fri, 22 Oct 2021 19:58:21 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4B24583178; Fri, 22 Oct 2021 10:58:16 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.b="FJuSzZj7"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id D391983409; Fri, 22 Oct 2021 10:58:12 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 1179782E48 for ; Fri, 22 Oct 2021 10:58:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Padmarao.Begari@microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1634893088; x=1666429088; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=RvFxbPOfIxamPwZZPLqbxTX4Gjsy/aJCAgID/mrLzjw=; b=FJuSzZj7nN/FqmKbhwRglRUjOtM0mzHUOy+jcZMh0/wB7olExrK1iJ/7 xQZZk4UzApoQXELXvuU6Zgu6X+SS2cnyJJwHwN3j0l3GRER8BnM7URyNE yxl1xQp/WTTMHEeDdYjmLvMdYLlhJB7U8AZ0ig0nLT1Fk8J+VwhyyKjrz xuEZzDDKolonsjz000DZswBYP0sn5sA0HhIoksiMxnaaDLz553BzlI3rA hXGn6H27hvjZN5SzHzVQTlj6KuvnhnnImU6/1eqxMA9bXS2JbwjzeuWpL CLUd/qToyiK3QuihuBdO9nPXgX/NNZQZFdfJpS7pdxTQ75rv9O4plUWu3 A==; IronPort-SDR: lHE9Y9u0A/qUaTHWBXjxUkn4t2wscnDKblRWCpR0BGavGdu2keb3JBuhH296mMwhirT60IslPQ Bibq8F10gwPUStE6TDgXLhrq/WviI6UvhMmuznwitT7T+TeB4+ec7MQpP2VIwYI2n7nlaPl3e3 oT0jCie+HmjMoL5+jTSifhCID6hjt6RHDQ30TqUA5ttSPB3XicZuntQlClNQyMzy34UzClWFW5 BRAt2zFs3VDnXo6RCUVmK2vSOEG/w9C3OzyruAfa9O6suSUpeMZPrVkEWfl+3AUjrwkyKCG/Gk 2IP6ogn7Px+5Yg+nLYg9NrRg X-IronPort-AV: E=Sophos;i="5.87,172,1631602800"; d="scan'208";a="149147377" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 22 Oct 2021 01:58:05 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Fri, 22 Oct 2021 01:58:05 -0700 Received: from padmarao-Vostro-460.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Fri, 22 Oct 2021 01:58:01 -0700 From: Padmarao Begari To: , , , , , CC: , , , , , , Padmarao Begari Subject: [PATCH v1 0/5] Update Microchip PolarFire SoC support Date: Fri, 22 Oct 2021 14:26:43 +0530 Message-ID: <20211022085648.134655-1-padmarao.begari@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean This patch set updates Microchip PolarFire SoC Icicle Kit support of RISC-V U-Boot. The patches are based upon latest U-Boot tree (https://source.denx.de/u-boot/u-boot) at commit id f200a4bcecf1be6d8b546f0eb6af6403c93d80dd The device tree split into .dtsi and .dts files, UART1 uses for console instead of UART0, UART0 is reserved for Hart Software Services, common device node for eMMC/SD, add Microchip I2C driver and default build for SBI_V02. Padmarao Begari (5): riscv: dts: Split Microchip device tree riscv: Update Microchip MPFS Icicle Kit support i2c: Add Microchip PolarFire SoC I2C driver net: macb: Compatible as per device tree doc: board: Update Microchip MPFS Icicle Kit doc arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 518 ++++------------ arch/riscv/dts/microchip-mpfs.dtsi | 571 ++++++++++++++++++ board/microchip/mpfs_icicle/Kconfig | 5 + board/microchip/mpfs_icicle/mpfs_icicle.c | 17 +- configs/microchip_mpfs_icicle_defconfig | 1 - doc/board/microchip/mpfs_icicle.rst | 11 +- drivers/i2c/Kconfig | 6 + drivers/i2c/Makefile | 1 + drivers/i2c/i2c-microchip.c | 482 +++++++++++++++ drivers/net/macb.c | 2 +- .../microchip-mpfs-plic.h | 195 ++++++ .../interrupt-controller/riscv-hart.h | 18 + 12 files changed, 1431 insertions(+), 396 deletions(-) create mode 100644 arch/riscv/dts/microchip-mpfs.dtsi create mode 100644 drivers/i2c/i2c-microchip.c create mode 100644 include/dt-bindings/interrupt-controller/microchip-mpfs-plic.h create mode 100644 include/dt-bindings/interrupt-controller/riscv-hart.h