From patchwork Thu Dec 3 09:28:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 1410235 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.a=rsa-sha256 header.s=mchp header.b=1cnc1ipI; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CmrC30kHNz9s1l for ; Thu, 3 Dec 2020 20:29:35 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 587ED8270C; Thu, 3 Dec 2020 10:29:30 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.b="1cnc1ipI"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A90318270C; Thu, 3 Dec 2020 10:29:28 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from esa3.microchip.iphmx.com (esa3.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 304D4825D5 for ; Thu, 3 Dec 2020 10:29:25 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Eugen.Hristev@microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1606987765; x=1638523765; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=o2UupM9UbMeSXrfy2ULakRWwqclptJ5o35cihchEgmo=; b=1cnc1ipIdtrQHRG+d1wNp8gFb3AyOHbgWRjtLO5bZgKr0DPdhWYFQApQ B3x0qOvYzrrcmpOqclhPawE+QB8w4R3abTZHSTujiHynoGJp+3DewLHmL ybtNFsactegmHLa6XtmDcpR3dpizPXHdDIPm26DrluOJqOVEXrUMII6bs Plmg2KLvFoyzXAjBli2r2gtJ1KeTjdwVB3PVy7r2qD1QpzT80KMEmUVs1 d4/kumEcHTagqIQVb94JVVtyCue7O7rQdZV28P22qmpeUmikTxng8Txtl x3tvGRKQDfPfyvEAb58UET4c6b4f78rRg1zDtFaq0pU+mUTRNkGpHDX3d A==; IronPort-SDR: PYCS+KNaaImcWJm8eua8vkutd8Lm4d85csq9YoxSUxTMawaulEGcObHZ+vp7h4nLLUmInePb0R 14iNMAE8szFRK0Y3Iu58WaOeiHPhnnLaIOLnhpfGl8VQshyh8/OcyZ4edz7CfHzjHgRzF2/5ue FeAqiEryw9r80W9bMJdw/bbe9i2Fz74YgTURm84lHRBct3NXCyTI6YMcX5iomAk7wuAftPVqyj npaZRZjAzQcHF/He0iTg1RX88tjRodkxcs2/mdDEuCw8cEetfH5i4jbFsiUZ29mG3kMZqfY8nt O0I= X-IronPort-AV: E=Sophos;i="5.78,389,1599548400"; d="scan'208";a="101254795" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 03 Dec 2020 02:29:23 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Thu, 3 Dec 2020 02:29:23 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Thu, 3 Dec 2020 02:29:16 -0700 From: Eugen Hristev To: CC: , , Subject: [PATCH 00/34] Sama7g5 Evaluation Kit support Date: Thu, 3 Dec 2020 11:28:16 +0200 Message-ID: <20201203092850.7909-1-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Hello, This series adds support for sama7g5 SoC DT and the sama7g5ek board. I kept the original incremental development for this board, with each commit's author and designated change, for traceability and for easier reviewing. The series starts from a basic devicetree and ends with a fully functional board including SD-Card/MMC, i2c eeproms, ethernet. Thanks, Eugen Claudiu Beznea (20): board: atmel: sama7g5ek: add SYS_MALLOC_F_LEN to SYS_INIT_SP_ADDR configs: sama7g5ek: set malloc pool to 68K configs: sama7g5ek: enable pll driver ARM: dts: sama7g5: move clock frequencies for xtals in board file ARM: dts: sama7g5: add slow rc and main rc oscillators ARM: dts: sama7g5: add u-boot,dm-pre-reloc bindings for xtals ARM: dts: sama7g5: add slow clock bindings ARM: dts: sama7g5: add PMC bindings ARM: dts: sama7g5: switch to PMC bindings configs: sama7g5: enable CONFIG_CPU ARM: dts: sama7g5: add CPU bindings configs: sama7g5: use PIT64B ARM: dts: sama7g5: enable autoboot ARM: dts: sama7g5: add pit64b support configs: sama7g5ek: enable mii command ARM: dts: sama7g5: add GMAC0 ARM: dts: sama7g5: add GMAC1 board: atmel: sama7g5ek: increase arp timeout and retry count configs: sama7g5ek: enable support for KSZ9131 configs: sama7g5ek: enable CCF Eugen Hristev (13): ARM: dts: sama7g5: add initial DT for sama7g5 SoC board: atmel: sama7g5ek: add initial support for sama7g5ek ARM: dts: at91: sama7g5: add pinctrl node ARM: dts: at91: sama7g5ek: add pinctrl for sdmmc1 and flx3 ARM: dts: at91: sama7g5: add assigned clocks for sdmmc1 ARM: dts: at91: sama7g5: add node for sdmmc0 ARM: dts: at91: sama7g5ek: enable sdmmc0 with pinctrl board: atmel: sama7g5ek: clean-up header bootcommand configs: sama7g5: add mmc config for sdmmc0 ARM: dts: at91: sama7g5: add flexcom1 and i2c subnode ARM: dts: sama7g5ek: add i2c1 bus and eeproms board: atmel: sama7g5ek: add support for MAC address retreival configs: sama7g5ek: add i2c and eeprom Nicolas Ferre (1): ARM: dts: sama7g5ek: fix TXC pin configuration arch/arm/dts/Makefile | 3 + arch/arm/dts/sama7g5.dtsi | 169 ++++++++++++++++++++++++ arch/arm/dts/sama7g5ek-u-boot.dtsi | 65 ++++++++++ arch/arm/dts/sama7g5ek.dts | 202 +++++++++++++++++++++++++++++ arch/arm/mach-at91/Kconfig | 8 ++ board/atmel/sama7g5ek/Kconfig | 15 +++ board/atmel/sama7g5ek/MAINTAINERS | 8 ++ board/atmel/sama7g5ek/Makefile | 7 + board/atmel/sama7g5ek/sama7g5ek.c | 76 +++++++++++ configs/sama7g5ek_mmc1_defconfig | 70 ++++++++++ configs/sama7g5ek_mmc_defconfig | 70 ++++++++++ include/configs/sama7g5ek.h | 45 +++++++ 12 files changed, 738 insertions(+) create mode 100644 arch/arm/dts/sama7g5.dtsi create mode 100644 arch/arm/dts/sama7g5ek-u-boot.dtsi create mode 100644 arch/arm/dts/sama7g5ek.dts create mode 100644 board/atmel/sama7g5ek/Kconfig create mode 100644 board/atmel/sama7g5ek/MAINTAINERS create mode 100644 board/atmel/sama7g5ek/Makefile create mode 100644 board/atmel/sama7g5ek/sama7g5ek.c create mode 100644 configs/sama7g5ek_mmc1_defconfig create mode 100644 configs/sama7g5ek_mmc_defconfig create mode 100644 include/configs/sama7g5ek.h