From patchwork Tue Sep 22 09:49:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siew Chin Lim X-Patchwork-Id: 1368892 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Bwc3Z1rkSz9sTC for ; Tue, 22 Sep 2020 19:49:45 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 33414825B3; Tue, 22 Sep 2020 11:49:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 4FEA4825AE; Tue, 22 Sep 2020 11:49:39 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=AC_FROM_MANY_DOTS,BAYES_00, SPF_HELO_NONE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 48F4381C0C for ; Tue, 22 Sep 2020 11:49:35 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=elly.siew.chin.lim@intel.com IronPort-SDR: nQryYNRfL6uxGhtS/9Sl2JOYZa5IO1RronNVfmX52Qi9tv540LpYWkSLGxNrzw0Czt80+I1F6w KDjSK8qWWpqA== X-IronPort-AV: E=McAfee;i="6000,8403,9751"; a="148322172" X-IronPort-AV: E=Sophos;i="5.77,290,1596524400"; d="scan'208";a="148322172" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Sep 2020 02:49:33 -0700 IronPort-SDR: 12WHcnz+Tb+OLRBQUR2EYoYnzG3jicjXVGn6Kkg3T8ofrWaU36c2mIRUQ+wedAi0UEMuFtz8C8 H1VMoEHSpklg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,290,1596524400"; d="scan'208";a="382255737" Received: from sj-nx25.altera.com ([10.142.100.216]) by orsmga001.jf.intel.com with ESMTP; 22 Sep 2020 02:49:32 -0700 From: Siew Chin Lim To: u-boot@lists.denx.de Cc: Marek Vasut , Ley Foon Tan , Chin Liang See , Simon Goldschmidt , Tien Fong Chee , Dalon Westergreen , Siew Chin Lim Subject: [PATCH v1 00/22] Add Intel Diamond Mesa SoC support Date: Tue, 22 Sep 2020 02:49:08 -0700 Message-Id: <20200922094930.100855-1-elly.siew.chin.lim@intel.com> X-Mailer: git-send-email 2.13.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean This patchset add Intel Diamond Mesa SoC[1] support. Intel Diamond Mesa SoC is with a 64-bit quad core ARM Cortex-A53 MPCore hard processor system (HPS). New IPs in Diamond Mesa are clock manager and DDR subsystem, other IPs have minor changes compared to Agilex. These patchsets have dependency on: Enable ARM Trusted Firmware for U-Boot https://lists.denx.de/pipermail/u-boot/2020-August/423530.html [1]: https://www.intel.com/content/www/us/en/products/programmable/asic/easic-devices/diamond-mesa-soc-devices.html Siew Chin Lim (22): arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64 arm: socfpga: dm: Add base address for Intel Diamond Mesa arm: socfpga: dm: Add firewall support for Agilex and Diamond Mesa arm: socfpga: Rename Stratix10 and Agilex handoff common macros arm: socfpga: Changed wrap_pll_config_s10.c to wrap_pll_config_soc64.c arm: socfpga: Changed system_manager_s10.c to system_manager_soc64.c arm: socfpga: Rearrange sequence of macros in handoff_soc64.h arm: socfpga: Restructure Stratix10 and Agilex handoff code arm: socfpga: Add handoff data support for Diamond Mesa drivers: clk: dm: Add clock driver for Diamond Mesa arm: socfpga: dm: Get clock manager base address for Diamond Mesa drivers: clk: dm: Add memory clock driver for Diamond Mesa arm: socfpga: Move Stratix10 and Agilex clock manager common code arm: socfpga: Changed to store QSPI reference clock in kHz arm: socfpga: dm: Add clock manager for Diamond Mesa ddr: altera: dm: Add SDRAM driver for Diamond Mesa arm: socfpga: Move Stratix10 and Agilex SPL common code arm: socfpga: dm: Add SPL for Diamond Mesa board: intel: dm: Add socdk board support for Diamond Mesa arm: dts: dm: Add base dtsi and devkit dts for Diamond Mesa configs: dm: Add Diamond Mesa CONFIGs arm: socfpga: dm: Enable Intel Diamond Mesa bulid arch/arm/Kconfig | 6 +- arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga_dm-u-boot.dtsi | 100 ++ arch/arm/dts/socfpga_dm.dtsi | 640 ++++++++++ arch/arm/dts/socfpga_dm_socdk-u-boot.dtsi | 50 + arch/arm/dts/socfpga_dm_socdk.dts | 144 +++ arch/arm/mach-socfpga/Kconfig | 23 + arch/arm/mach-socfpga/Makefile | 33 +- arch/arm/mach-socfpga/clock_manager.c | 11 + arch/arm/mach-socfpga/clock_manager_agilex.c | 6 - .../{clock_manager_agilex.c => clock_manager_dm.c} | 32 +- arch/arm/mach-socfpga/clock_manager_s10.c | 8 +- arch/arm/mach-socfpga/firewall.c | 10 + arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 3 +- arch/arm/mach-socfpga/include/mach/clock_manager.h | 6 + .../mach-socfpga/include/mach/clock_manager_dm.h | 14 + .../mach-socfpga/include/mach/clock_manager_s10.h | 1 - arch/arm/mach-socfpga/include/mach/firewall.h | 7 + arch/arm/mach-socfpga/include/mach/handoff_s10.h | 39 - arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 81 ++ arch/arm/mach-socfpga/include/mach/reset_manager.h | 3 +- .../arm/mach-socfpga/include/mach/system_manager.h | 3 +- .../include/mach/system_manager_soc64.h | 20 +- arch/arm/mach-socfpga/mailbox_s10.c | 28 +- arch/arm/mach-socfpga/misc.c | 3 + arch/arm/mach-socfpga/spl_agilex.c | 16 - arch/arm/mach-socfpga/{spl_agilex.c => spl_dm.c} | 37 +- arch/arm/mach-socfpga/spl_s10.c | 17 - arch/arm/mach-socfpga/spl_soc64.c | 26 + ...system_manager_s10.c => system_manager_soc64.c} | 53 +- arch/arm/mach-socfpga/wrap_handoff_soc64.c | 113 ++ arch/arm/mach-socfpga/wrap_pinmux_config_s10.c | 56 - ...ap_pll_config_s10.c => wrap_pll_config_soc64.c} | 18 +- board/intel/dm-socdk/MAINTAINERS | 7 + board/intel/dm-socdk/Makefile | 7 + board/intel/dm-socdk/socfpga.c | 7 + configs/socfpga_dm_atf_defconfig | 75 ++ configs/socfpga_dm_defconfig | 69 ++ drivers/clk/altera/Makefile | 3 +- drivers/clk/altera/clk-dm.c | 504 ++++++++ drivers/clk/altera/clk-dm.h | 213 ++++ drivers/clk/altera/clk-mem-dm.c | 135 ++ drivers/clk/altera/clk-mem-dm.h | 80 ++ drivers/ddr/altera/Kconfig | 6 +- drivers/ddr/altera/Makefile | 1 + drivers/ddr/altera/sdram_dm.c | 1294 ++++++++++++++++++++ drivers/ddr/altera/sdram_soc64.c | 6 + drivers/fpga/Kconfig | 2 +- drivers/sysreset/Kconfig | 2 +- include/configs/socfpga_dm_socdk.h | 46 + include/configs/socfpga_soc64_common.h | 4 +- include/dt-bindings/clock/dm-clock.h | 71 ++ 52 files changed, 3898 insertions(+), 242 deletions(-) create mode 100644 arch/arm/dts/socfpga_dm-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_dm.dtsi create mode 100644 arch/arm/dts/socfpga_dm_socdk-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_dm_socdk.dts copy arch/arm/mach-socfpga/{clock_manager_agilex.c => clock_manager_dm.c} (59%) create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_dm.h delete mode 100644 arch/arm/mach-socfpga/include/mach/handoff_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/handoff_soc64.h copy arch/arm/mach-socfpga/{spl_agilex.c => spl_dm.c} (77%) create mode 100644 arch/arm/mach-socfpga/spl_soc64.c rename arch/arm/mach-socfpga/{system_manager_s10.c => system_manager_soc64.c} (55%) create mode 100644 arch/arm/mach-socfpga/wrap_handoff_soc64.c delete mode 100644 arch/arm/mach-socfpga/wrap_pinmux_config_s10.c rename arch/arm/mach-socfpga/{wrap_pll_config_s10.c => wrap_pll_config_soc64.c} (71%) create mode 100644 board/intel/dm-socdk/MAINTAINERS create mode 100644 board/intel/dm-socdk/Makefile create mode 100644 board/intel/dm-socdk/socfpga.c create mode 100644 configs/socfpga_dm_atf_defconfig create mode 100644 configs/socfpga_dm_defconfig create mode 100644 drivers/clk/altera/clk-dm.c create mode 100644 drivers/clk/altera/clk-dm.h create mode 100644 drivers/clk/altera/clk-mem-dm.c create mode 100644 drivers/clk/altera/clk-mem-dm.h create mode 100644 drivers/ddr/altera/sdram_dm.c create mode 100644 include/configs/socfpga_dm_socdk.h create mode 100644 include/dt-bindings/clock/dm-clock.h