From patchwork Mon Aug 17 04:34:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ang, Chee Hong" X-Patchwork-Id: 1345599 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BVLmw59pmz9sTH for ; Mon, 17 Aug 2020 14:34:55 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A281881B88; Mon, 17 Aug 2020 06:34:51 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 80149821F0; Mon, 17 Aug 2020 06:34:50 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: * X-Spam-Status: No, score=1.1 required=5.0 tests=AC_FROM_MANY_DOTS,BAYES_00, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6DE798000F for ; Mon, 17 Aug 2020 06:34:46 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=chee.hong.ang@intel.com IronPort-SDR: rceMq9VWpRA1AAsA6IvtXHZhKXHbXTLD5PHXhXWv0YPLLMvk2s8TUPGaEZUDoQyLGkB4N/XZ4C d26ROXXmubWg== X-IronPort-AV: E=McAfee;i="6000,8403,9715"; a="155729059" X-IronPort-AV: E=Sophos;i="5.76,322,1592895600"; d="scan'208";a="155729059" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Aug 2020 21:34:43 -0700 IronPort-SDR: LWwlNIAfjHba1+C5hMT8c/obO/NhJnHDE0/xL8D+7SGGGbID4RBHSwK6qV6gqh0K0Pgpe2eIbQ 80DmEMhUp9iA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,322,1592895600"; d="scan'208";a="328499652" Received: from ppglcf0010.png.intel.com ([10.226.229.26]) by fmsmga002.fm.intel.com with ESMTP; 16 Aug 2020 21:34:40 -0700 From: Chee Hong Ang To: u-boot@lists.denx.de Cc: Marek Vasut , Simon Goldschmidt , Tom Rini , Ching Liang See , Ley Foon , Chee Hong Ang , Tien Fong , Siew Chin Subject: [PATCH v1 00/16] Enable ARM Trusted Firmware for U-Boot Date: Mon, 17 Aug 2020 12:34:15 +0800 Message-Id: <20200817043431.28718-1-chee.hong.ang@intel.com> X-Mailer: git-send-email 2.19.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Repost of the following patchs: https://lists.denx.de/pipermail/u-boot/2020-March/402705.html New U-boot flow with ARM Trusted Firmware (ATF) support: SPL (EL3) -> ATF-BL31 (EL3) -> U-Boot Proper (EL2) -> Linux (EL1) SPL loads the u-boot.itb which consist of: 1) u-boot-nodtb.bin (U-Boot Proper image) 2) u-boot.dtb (U-Boot Proper DTB) 3) bl31.bin (ATF-BL31 image) Supported Platform: Intel SoCFPGA 64bits (Stratix10 & Agilex) Now, U-Boot Proper is running in non-secure mode (EL2), it invokes SMC/PSCI calls provided by ATF to perform COLD reset, System Manager register accesses and mailbox communications with Secure Device Manager (SDM). Steps to build the U-Boot with ATF support: 1) Build U-Boot 2) Build ATF BL31 3) Copy ATF BL31 binary image into U-Boot's root folder 4) "make u-boot.itb" to generate u-boot.itb These patchsets have dependency on: arm: socfpga: soc64: Add timeout waiting for NOC idle ACK https://lists.denx.de/pipermail/u-boot/2020-August/423029.html Rename Stratix10 FPGA driver and support Agilex https://lists.denx.de/pipermail/u-boot/2020-August/422798.html SoCFPGA mailbox driver fixes and enhancements https://lists.denx.de/pipermail/u-boot/2020-August/423140.html arm: socfpga: soc64: Initialize timer in SPL only https://lists.denx.de/pipermail/u-boot/2020-July/419692.html arm: socfpga: soc64: Remove PHY interface setup from misc arch init https://lists.denx.de/pipermail/u-boot/2020-July/419690.html Enable sysreset support for SoCFPGA SoC64 platforms https://lists.denx.de/pipermail/u-boot/2020-August/422509.html arm: socfpga: soc64: Disable CONFIG_PSCI_RESET https://lists.denx.de/pipermail/u-boot/2020-August/423373.html Chee Hong Ang (16): arm: socfpga: soc64: Remove CONFIG_OF_EMBED arm: socfpga: soc64: Add FIT generator script for pack itb with ATF arm: socfpga: Add function for checking description from FIT image arm: socfpga: soc64: Load FIT image with ATF support arm: socfpga: soc64: Override 'lowlevel_init' to support ATF arm: socfpga: Disable "spin-table" method for booting Linux arm: socfpga: soc64: Add SMC helper function for Intel SOCFPGA (64bits) arm: socfpga: soc64: Define SMC function identifiers for PSCI SiP services mmc: dwmmc: socfpga: Add ATF support for MMC driver net: designware: socfpga: Add ATF support for MAC driver arm: socfpga: soc64: Add ATF support for Reset Manager driver arm: socfpga: soc64: Add ATF support for FPGA reconfig driver arm: socfpga: mailbox: Add 'SYSTEM_RESET' PSCI support to mbox_reset_cold() arm: socfpga: soc64: SSBL shall not setup stack on OCRAM arm: socfpga: soc64: Skip handoff data access in SSBL configs: socfpga: Add defconfig for Agilex and Stratix 10 with ATF support arch/arm/mach-socfpga/Kconfig | 2 - arch/arm/mach-socfpga/Makefile | 4 + arch/arm/mach-socfpga/board.c | 12 +- arch/arm/mach-socfpga/include/mach/smc_api.h | 13 + arch/arm/mach-socfpga/lowlevel_init_soc64.S | 76 +++ arch/arm/mach-socfpga/mailbox_s10.c | 5 + arch/arm/mach-socfpga/reset_manager_s10.c | 10 + arch/arm/mach-socfpga/smc_api.c | 56 ++ arch/arm/mach-socfpga/wrap_pll_config_s10.c | 3 +- board/altera/soc64/fit_spl_atf.sh | 91 +++ ...defconfig => socfpga_agilex_atf_defconfig} | 25 +- configs/socfpga_agilex_defconfig | 1 - ...config => socfpga_stratix10_atf_defconfig} | 25 +- configs/socfpga_stratix10_defconfig | 1 - drivers/fpga/intel_sdm_mb.c | 139 +++++ drivers/mmc/socfpga_dw_mmc.c | 20 + drivers/net/dwmac_socfpga.c | 43 +- include/configs/socfpga_soc64_common.h | 9 + include/linux/intel-smc.h | 573 ++++++++++++++++++ 19 files changed, 1078 insertions(+), 30 deletions(-) create mode 100644 arch/arm/mach-socfpga/include/mach/smc_api.h create mode 100644 arch/arm/mach-socfpga/lowlevel_init_soc64.S create mode 100644 arch/arm/mach-socfpga/smc_api.c create mode 100755 board/altera/soc64/fit_spl_atf.sh copy configs/{socfpga_agilex_defconfig => socfpga_agilex_atf_defconfig} (77%) copy configs/{socfpga_stratix10_defconfig => socfpga_stratix10_atf_defconfig} (80%) create mode 100644 include/linux/intel-smc.h