From patchwork Fri Jul 24 10:08:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 1335557 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256 header.s=phobos-20191101 header.b=ao8l0NZ7; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BClLK5vBLz9sRK for ; Fri, 24 Jul 2020 20:09:45 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2421D821DD; Fri, 24 Jul 2020 12:09:29 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1595585369; bh=O0aySZDuMGL74unkIibS6IbYjE7Veqz0NpYia8KpOvY=; h=From:To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From; b=ao8l0NZ7W+ux7SgQad/3SEwR4DHUjdSnpobYvNPFFXofRTxvoyyF3NCYQ/CqTy9uZ BaH6tCMpdj62X4zBTeKpEi9ZfmR2AyuhkDwpN+gllrz7JwOPB2+1f8YbRxhO6RSPnD pQemHInIl7GRIQHTjpUqNssyE74l3in+y1TTF/DzaFOA0fIQ5HG0L8/PKB1zoTifKD Ni6rQseE9idSiceDeEJfGRebFWzQQRSkNc6/MhsZ6jiCj1tjP6MftzpNak9d1b+udx CtJGaipjI38Sm6izAZggRp5ACSpgUyPRmACtLhoh5SsDAkLh9p63X0l8QDxve54p29 QeHiIHAimRcNA== Received: by phobos.denx.de (Postfix, from userid 109) id 16383821DD; Fri, 24 Jul 2020 12:09:26 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mx2.mailbox.org (mx2.mailbox.org [80.241.60.215]) (using TLSv1.2 with cipher ECDHE-RSA-CHACHA20-POLY1305 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D89DA821A2 for ; Fri, 24 Jul 2020 12:09:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=sr@denx.de Received: from smtp2.mailbox.org (smtp2.mailbox.org [IPv6:2001:67c:2050:105:465:1:2:0]) (using TLSv1.2 with cipher ECDHE-RSA-CHACHA20-POLY1305 (256/256 bits)) (No client certificate requested) by mx2.mailbox.org (Postfix) with ESMTPS id 4CCCAA1BA4; Fri, 24 Jul 2020 12:09:01 +0200 (CEST) Received: from smtp2.mailbox.org ([80.241.60.241]) by spamfilter05.heinlein-hosting.de (spamfilter05.heinlein-hosting.de [80.241.56.123]) (amavisd-new, port 10030) with ESMTP id f5XUR9CPbBzU; Fri, 24 Jul 2020 12:08:57 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Cc: trini@konsulko.com, sgarapati@marvell.com, awilliams@marvell.com, sjg@chromium.org, cchavva@marvell.com Subject: [PATCH v1 00/24] arm: Introduce Marvell/Cavium OcteonTX/TX2 Date: Fri, 24 Jul 2020 12:08:32 +0200 Message-Id: <20200724100856.1482324-1-sr@denx.de> MIME-Version: 1.0 X-MBO-SPAM-Probability: 13 X-Rspamd-Score: 1.99 / 15.00 / 15.00 X-Rspamd-Queue-Id: 13C03179A X-Rspamd-UID: 659b8f X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean This series will add support for OcteonTX and OcteonTX2 processsor based platforms. The Marvell/Cavium Octeon-TX 64-bit ARM based SoCs include the CN80XX, CN81XX and CN83XX while Octeon-TX2 64-bit ARM based SoCs include support for CN96XX and CN95XX. These SoC's have peripheral drivers based on PCI ECAM. Patches [1 -11] Add requied changes to PCI framework - [6] Add support for multi-memory region range - [7] EA in bridges - [8] SR-IOV [12 - 14] Add OcteonTX/TX2 platform header files [15] AHCI changes [16 - 22] Add OcteonTX/TX2 drivers [23 - 24] Add OcteonTX/TX2 board files and configurations Update from RFC -> v1 (Stefan): I took over upstreaming the patchset from Suneel. Suneel addressed some of the review comments. I addressed some more. This patchset is based on top of mainline plus the latest MIPS Octeon patchset: [PATCH v2 00/10] mips: octeon: Misc Octeon drivers, DT and Kconfig / defconfig updates Some of the drivers originally included in this patchset have already been integrated into mainline (like I2C) and some are part of the MIPS Octeon patchset mentioned above. The reason being, that MIPS Octeon and Octen TX/TX2 share most of the peripherals, so a re-use of the drivers in all Octeon platforms makes much sense. Thanks, Stefan Changes in v1: - Added return value description to function prototype in header - Changed from using be32_to_cpup() to fdt32_to_cpu() - New patch - New patch, replaces increase of MAX_PCI_REGIONS to 10 - Change patch subject - Change patch subject - Change patch subject - Enhance Kconfig help descrition - Use if() instead of #if - Change patch subject - Change patch subject - Enhance commit text: expanded the abbreviations - Changed some printf() to debug() - Changed 0 to '\0' in memset() - Comments for variables in struct pci_child_platdata added - Comments for newly introduced functions added in prototype / header - Change patch subject - Fixed multi-line comment style - Moved "feature" into new function which is only called, when CONFIG_PCI_SRIOV is enabled, so that the code is not increased in all cases - Changed variable declaration to use reverse xmas tree order - Change patch subject - Fixed multi-line comment style - Added CONFIG_PCI_ARID and enabled the new code optionally, so that the code size is not increased in all cases - New patch - Change patch subject - Add small commit text - Also add clr/setbits_64 (without endianess extension), which is needed for the updated Octeon device drivers - Change patch subject - Change patch subject - Change patch subject - Use constants from pci_ids.h instead of hardcoded values - Change patch subject - Remove inclusion of common.h - Remove #ifdef's and use driver specific data instead - Add comments to struct - Add some helper functions to reduce code size - Misc coding style changes (blank lines etc) - Use debug() instead of printf() in some cases - Change patch subject - Change patch subject - Rebased on latest TOT - Removed inclusion of common.h - Fix most checkpatch errors / warnings (use IS_ENABLED etc) - Change patch subject - Change patch subject - Rebased on latest TOT - Removed inclusion of common.h - Change patch subject - Rebased on latest TOT - Removed inclusion of common.h - Change patch subject - Remove inclusion of common.h - Remove global wdt_dev as its unused - Remove #ifdef's - Remove optional fixed register access - only use address passed via DT while probing - Use dev_remap_addr() instead of dev_read_addr_index() - Changed patch subject - Rebased on latest TOT - Removed inclusion of common.h - Moved MEMTEST defines to Kconfig - *.c files checkpatch cleanup - Changed patch subject - Rebased on latest TOT - Removed inclusion of common.h - Moved MEMTEST defines to Kconfig - *.c files checkpatch cleanup - Add go_uboot cmd for U-Boot starting from RAM Stefan Roese (2): pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set pci: pci-uclass: Dynamically allocate the PCI regions Suneel Garapati (22): fdtdec: Add API to read pci bus-range property pci: pci-uclass: Fix incorrect argument in map_sysmem pci: pci-uclass: Make DT subnode parse optional pci: pci-uclass: Add multi entry support for memory regions pci: pci-uclass: Add support for Enhanced Allocation in Bridges pci: pci-uclass: Add support for Single-Root I/O Virtualization pci: pci-uclass: Add VF BAR map support for Enhanced Allocation pci: pci-uclass: Add support for Alternate-RoutingID capability pci: pci-uclass: Check validity of ofnode arm: include/asm/io.h: Add 64bit clrbits and setbits helpers arm: octeontx: Add headers for OcteonTX arm: octeontx2: Add headers for OcteonTX2 ata: ahci: Add BAR index quirk for Cavium PCI SATA device pci: Add PCI controller driver for OcteonTX / TX2 mmc: Remove static qualifier on mmc_power_init mmc: Add MMC controller driver for OcteonTX / TX2 mtd: nand: Add NAND controller driver for OcteonTX net: Add NIC controller driver for OcteonTX net: Add NIC controller driver for OcteonTX2 watchdog: Add reset support for OcteonTX / TX2 arm: octeontx: Add support for OcteonTX SoC platforms arm: octeontx2: Add support for OcteonTX2 SoC platforms arch/arm/Kconfig | 22 + arch/arm/Makefile | 2 + arch/arm/include/asm/arch-octeontx/board.h | 123 + arch/arm/include/asm/arch-octeontx/clock.h | 25 + .../asm/arch-octeontx/csrs/csrs-mio_emm.h | 1193 ++ .../include/asm/arch-octeontx/csrs/csrs-xcv.h | 428 + arch/arm/include/asm/arch-octeontx/gpio.h | 6 + arch/arm/include/asm/arch-octeontx/smc.h | 20 + arch/arm/include/asm/arch-octeontx/soc.h | 33 + arch/arm/include/asm/arch-octeontx2/board.h | 128 + arch/arm/include/asm/arch-octeontx2/clock.h | 24 + .../asm/arch-octeontx2/csrs/csrs-cgx.h | 7851 ++++++++++++ .../asm/arch-octeontx2/csrs/csrs-lmt.h | 60 + .../asm/arch-octeontx2/csrs/csrs-mio_emm.h | 1193 ++ .../asm/arch-octeontx2/csrs/csrs-nix.h | 10404 ++++++++++++++++ .../asm/arch-octeontx2/csrs/csrs-npa.h | 2294 ++++ .../asm/arch-octeontx2/csrs/csrs-npc.h | 1629 +++ .../asm/arch-octeontx2/csrs/csrs-rvu.h | 2276 ++++ arch/arm/include/asm/arch-octeontx2/gpio.h | 6 + arch/arm/include/asm/arch-octeontx2/smc-id.h | 32 + arch/arm/include/asm/arch-octeontx2/smc.h | 18 + arch/arm/include/asm/arch-octeontx2/soc.h | 33 + arch/arm/include/asm/io.h | 16 + arch/arm/mach-octeontx/Kconfig | 23 + arch/arm/mach-octeontx/Makefile | 9 + arch/arm/mach-octeontx/clock.c | 35 + arch/arm/mach-octeontx/cpu.c | 76 + arch/arm/mach-octeontx/lowlevel_init.S | 33 + arch/arm/mach-octeontx2/Kconfig | 23 + arch/arm/mach-octeontx2/Makefile | 9 + arch/arm/mach-octeontx2/clock.c | 35 + arch/arm/mach-octeontx2/config.mk | 4 + arch/arm/mach-octeontx2/cpu.c | 72 + arch/arm/mach-octeontx2/lowlevel_init.S | 33 + board/Marvell/octeontx/Kconfig | 14 + board/Marvell/octeontx/MAINTAINERS | 8 + board/Marvell/octeontx/Makefile | 9 + board/Marvell/octeontx/board-fdt.c | 311 + board/Marvell/octeontx/board.c | 152 + board/Marvell/octeontx/smc.c | 25 + board/Marvell/octeontx/soc-utils.c | 50 + board/Marvell/octeontx2/Kconfig | 14 + board/Marvell/octeontx2/MAINTAINERS | 8 + board/Marvell/octeontx2/Makefile | 9 + board/Marvell/octeontx2/board-fdt.c | 221 + board/Marvell/octeontx2/board.c | 247 + board/Marvell/octeontx2/smc.c | 58 + board/Marvell/octeontx2/soc-utils.c | 49 + board/renesas/rcar-common/common.c | 10 +- configs/octeontx2_95xx_defconfig | 105 + configs/octeontx2_96xx_defconfig | 131 + configs/octeontx_81xx_defconfig | 134 + configs/octeontx_83xx_defconfig | 129 + drivers/ata/ahci.c | 8 + drivers/mmc/Kconfig | 9 + drivers/mmc/Makefile | 1 + drivers/mmc/mmc.c | 2 +- drivers/mmc/octeontx_hsmmc.c | 3904 ++++++ drivers/mmc/octeontx_hsmmc.h | 207 + drivers/mtd/nand/raw/Kconfig | 16 + drivers/mtd/nand/raw/Makefile | 2 + drivers/mtd/nand/raw/octeontx_bch.c | 426 + drivers/mtd/nand/raw/octeontx_bch.h | 133 + drivers/mtd/nand/raw/octeontx_bch_regs.h | 169 + drivers/mtd/nand/raw/octeontx_nand.c | 2264 ++++ drivers/net/Kconfig | 31 + drivers/net/Makefile | 4 + drivers/net/octeontx/Makefile | 9 + drivers/net/octeontx/bgx.c | 1572 +++ drivers/net/octeontx/bgx.h | 259 + drivers/net/octeontx/nic.h | 510 + drivers/net/octeontx/nic_main.c | 780 ++ drivers/net/octeontx/nic_reg.h | 252 + drivers/net/octeontx/nicvf_main.c | 583 + drivers/net/octeontx/nicvf_queues.c | 1142 ++ drivers/net/octeontx/nicvf_queues.h | 355 + drivers/net/octeontx/q_struct.h | 697 ++ drivers/net/octeontx/smi.c | 383 + drivers/net/octeontx/xcv.c | 129 + drivers/net/octeontx2/Makefile | 11 + drivers/net/octeontx2/cgx.c | 298 + drivers/net/octeontx2/cgx.h | 107 + drivers/net/octeontx2/cgx_intf.c | 717 ++ drivers/net/octeontx2/cgx_intf.h | 450 + drivers/net/octeontx2/lmt.h | 51 + drivers/net/octeontx2/nix.c | 833 ++ drivers/net/octeontx2/nix.h | 355 + drivers/net/octeontx2/nix_af.c | 1104 ++ drivers/net/octeontx2/npc.h | 92 + drivers/net/octeontx2/rvu.h | 121 + drivers/net/octeontx2/rvu_af.c | 173 + drivers/net/octeontx2/rvu_common.c | 73 + drivers/net/octeontx2/rvu_pf.c | 118 + drivers/pci/Kconfig | 37 + drivers/pci/Makefile | 1 + drivers/pci/pci-uclass.c | 289 +- drivers/pci/pci_octeontx.c | 344 + drivers/watchdog/Kconfig | 10 + drivers/watchdog/Makefile | 1 + drivers/watchdog/octeontx_wdt.c | 57 + include/configs/octeontx2_common.h | 72 + include/configs/octeontx_common.h | 89 + include/fdtdec.h | 13 + include/mmc.h | 1 + include/pci.h | 45 +- lib/fdtdec.c | 16 + 106 files changed, 49126 insertions(+), 51 deletions(-) create mode 100644 arch/arm/include/asm/arch-octeontx/board.h create mode 100644 arch/arm/include/asm/arch-octeontx/clock.h create mode 100644 arch/arm/include/asm/arch-octeontx/csrs/csrs-mio_emm.h create mode 100644 arch/arm/include/asm/arch-octeontx/csrs/csrs-xcv.h create mode 100644 arch/arm/include/asm/arch-octeontx/gpio.h create mode 100644 arch/arm/include/asm/arch-octeontx/smc.h create mode 100644 arch/arm/include/asm/arch-octeontx/soc.h create mode 100644 arch/arm/include/asm/arch-octeontx2/board.h create mode 100644 arch/arm/include/asm/arch-octeontx2/clock.h create mode 100644 arch/arm/include/asm/arch-octeontx2/csrs/csrs-cgx.h create mode 100644 arch/arm/include/asm/arch-octeontx2/csrs/csrs-lmt.h create mode 100644 arch/arm/include/asm/arch-octeontx2/csrs/csrs-mio_emm.h create mode 100644 arch/arm/include/asm/arch-octeontx2/csrs/csrs-nix.h create mode 100644 arch/arm/include/asm/arch-octeontx2/csrs/csrs-npa.h create mode 100644 arch/arm/include/asm/arch-octeontx2/csrs/csrs-npc.h create mode 100644 arch/arm/include/asm/arch-octeontx2/csrs/csrs-rvu.h create mode 100644 arch/arm/include/asm/arch-octeontx2/gpio.h create mode 100644 arch/arm/include/asm/arch-octeontx2/smc-id.h create mode 100644 arch/arm/include/asm/arch-octeontx2/smc.h create mode 100644 arch/arm/include/asm/arch-octeontx2/soc.h create mode 100644 arch/arm/mach-octeontx/Kconfig create mode 100644 arch/arm/mach-octeontx/Makefile create mode 100644 arch/arm/mach-octeontx/clock.c create mode 100644 arch/arm/mach-octeontx/cpu.c create mode 100644 arch/arm/mach-octeontx/lowlevel_init.S create mode 100644 arch/arm/mach-octeontx2/Kconfig create mode 100644 arch/arm/mach-octeontx2/Makefile create mode 100644 arch/arm/mach-octeontx2/clock.c create mode 100644 arch/arm/mach-octeontx2/config.mk create mode 100644 arch/arm/mach-octeontx2/cpu.c create mode 100644 arch/arm/mach-octeontx2/lowlevel_init.S create mode 100644 board/Marvell/octeontx/Kconfig create mode 100644 board/Marvell/octeontx/MAINTAINERS create mode 100644 board/Marvell/octeontx/Makefile create mode 100644 board/Marvell/octeontx/board-fdt.c create mode 100644 board/Marvell/octeontx/board.c create mode 100644 board/Marvell/octeontx/smc.c create mode 100644 board/Marvell/octeontx/soc-utils.c create mode 100644 board/Marvell/octeontx2/Kconfig create mode 100644 board/Marvell/octeontx2/MAINTAINERS create mode 100644 board/Marvell/octeontx2/Makefile create mode 100644 board/Marvell/octeontx2/board-fdt.c create mode 100644 board/Marvell/octeontx2/board.c create mode 100644 board/Marvell/octeontx2/smc.c create mode 100644 board/Marvell/octeontx2/soc-utils.c create mode 100644 configs/octeontx2_95xx_defconfig create mode 100644 configs/octeontx2_96xx_defconfig create mode 100644 configs/octeontx_81xx_defconfig create mode 100644 configs/octeontx_83xx_defconfig create mode 100644 drivers/mmc/octeontx_hsmmc.c create mode 100644 drivers/mmc/octeontx_hsmmc.h create mode 100644 drivers/mtd/nand/raw/octeontx_bch.c create mode 100644 drivers/mtd/nand/raw/octeontx_bch.h create mode 100644 drivers/mtd/nand/raw/octeontx_bch_regs.h create mode 100644 drivers/mtd/nand/raw/octeontx_nand.c create mode 100644 drivers/net/octeontx/Makefile create mode 100644 drivers/net/octeontx/bgx.c create mode 100644 drivers/net/octeontx/bgx.h create mode 100644 drivers/net/octeontx/nic.h create mode 100644 drivers/net/octeontx/nic_main.c create mode 100644 drivers/net/octeontx/nic_reg.h create mode 100644 drivers/net/octeontx/nicvf_main.c create mode 100644 drivers/net/octeontx/nicvf_queues.c create mode 100644 drivers/net/octeontx/nicvf_queues.h create mode 100644 drivers/net/octeontx/q_struct.h create mode 100644 drivers/net/octeontx/smi.c create mode 100644 drivers/net/octeontx/xcv.c create mode 100644 drivers/net/octeontx2/Makefile create mode 100644 drivers/net/octeontx2/cgx.c create mode 100644 drivers/net/octeontx2/cgx.h create mode 100644 drivers/net/octeontx2/cgx_intf.c create mode 100644 drivers/net/octeontx2/cgx_intf.h create mode 100644 drivers/net/octeontx2/lmt.h create mode 100644 drivers/net/octeontx2/nix.c create mode 100644 drivers/net/octeontx2/nix.h create mode 100644 drivers/net/octeontx2/nix_af.c create mode 100644 drivers/net/octeontx2/npc.h create mode 100644 drivers/net/octeontx2/rvu.h create mode 100644 drivers/net/octeontx2/rvu_af.c create mode 100644 drivers/net/octeontx2/rvu_common.c create mode 100644 drivers/net/octeontx2/rvu_pf.c create mode 100644 drivers/pci/pci_octeontx.c create mode 100644 drivers/watchdog/octeontx_wdt.c create mode 100644 include/configs/octeontx2_common.h create mode 100644 include/configs/octeontx_common.h