From patchwork Tue Mar 19 08:50:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chee, Tien Fong" X-Patchwork-Id: 1058282 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44Nmwf6K5yz9s4Y for ; Tue, 19 Mar 2019 19:50:42 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 81EC3C21F79; Tue, 19 Mar 2019 08:50:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id DA649C21BE5; Tue, 19 Mar 2019 08:50:37 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E6059C21D83; Tue, 19 Mar 2019 08:50:36 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lists.denx.de (Postfix) with ESMTPS id 07386C21BE5 for ; Tue, 19 Mar 2019 08:50:35 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Mar 2019 01:50:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,497,1544515200"; d="scan'208";a="283900349" Received: from pg-iccf0195.altera.com ([10.104.4.90]) by orsmga004.jf.intel.com with ESMTP; 19 Mar 2019 01:50:30 -0700 From: tien.fong.chee@intel.com To: u-boot@lists.denx.de Date: Tue, 19 Mar 2019 16:50:10 +0800 Message-Id: <20190319085019.6647-1-tien.fong.chee@intel.com> X-Mailer: git-send-email 2.13.0 Cc: Marek Vasut , Tien Fong Chee , Ching Liang See , Westergteen Dalon Subject: [U-Boot] [PATCH v12 0/9] Add support for loading FPGA bitstream X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Tien Fong Chee This version mainly resolved comments from Dinh in [v11]. This series is working on top of u-boot.git http://git.denx.de/u-boot.git These patches are required before applying this series of patches 1. [U-Boot,v4] misc: fs_loader: Add support for initializing block device https://patchwork.ozlabs.org/project/uboot/list/?series=89282 (done review) 2. [U-Boot] fpga: Replace char * with const char * for filename https://patchwork.ozlabs.org/patch/1042665/ (done review) 3. [U-Boot] misc: fs_loader: Replace label with DT phandle https://patchwork.ozlabs.org/patch/1051782/ (under review) [v11]: https://www.mail-archive.com/u-boot@lists.denx.de/msg318174.html [v10]: https://www.mail-archive.com/u-boot@lists.denx.de/msg318167.html [v9]: https://www.mail-archive.com/u-boot@lists.denx.de/msg316086.html [v8]: https://www.mail-archive.com/u-boot@lists.denx.de/msg316086.html [v7]: https://www.mail-archive.com/u-boot@lists.denx.de/msg314511.html Tien Fong Chee (9): ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK ARM: socfpga: Cleaning up and ensuring consistent format messages in driver ARM: socfpga: Moving the watchdog reset to the for-loop status polling ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK spl : socfpga: Implement fpga bitstream loading with socfpga loadfs ARM: socfpga: Synchronize the configuration for A10 SoCDK ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 17 + .../include/mach/fpga_manager_arria10.h | 40 +- arch/arm/mach-socfpga/spl_a10.c | 31 +- board/altera/arria10-socdk/fit_spl_fpga.its | 38 ++ configs/socfpga_arria10_defconfig | 22 +- .../fpga/altera-socfpga-a10-fpga-mgr.txt | 26 +- drivers/fpga/socfpga_arria10.c | 514 ++++++++++++++++++++- include/configs/socfpga_common.h | 4 +- include/image.h | 4 + 9 files changed, 664 insertions(+), 32 deletions(-) create mode 100644 board/altera/arria10-socdk/fit_spl_fpga.its