From patchwork Mon Jun 25 10:37:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 934156 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aosc.io Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 41Dm0q13vcz9ryk for ; Mon, 25 Jun 2018 20:40:43 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id C110FC21E0B; Mon, 25 Jun 2018 10:40:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 421A0C21E2F; Mon, 25 Jun 2018 10:39:44 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 57824C21E15; Mon, 25 Jun 2018 10:39:43 +0000 (UTC) Received: from bird.maple.relay.mailchannels.net (bird.maple.relay.mailchannels.net [23.83.214.17]) by lists.denx.de (Postfix) with ESMTPS id 84977C21C93 for ; Mon, 25 Jun 2018 10:38:03 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id 6DF1B5C2C33; Mon, 25 Jun 2018 10:38:01 +0000 (UTC) Received: from hermes.aosc.io (unknown [100.96.19.104]) (Authenticated sender: lmn-TZDUIOWCRQMW) by relay.mailchannels.net (Postfix) with ESMTPA id E5AE45C271C; Mon, 25 Jun 2018 10:37:59 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from hermes.aosc.io (hermes.aosc.io [199.195.250.187]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384) by 0.0.0.0:2500 (trex/5.15.3); Mon, 25 Jun 2018 10:38:01 +0000 X-MC-Relay: Neutral X-MailChannels-SenderId: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io X-MailChannels-Auth-Id: lmn-TZDUIOWCRQMW X-Sponge-Shrill: 338bfc8d4a08399a_1529923080676_591922914 X-MC-Loop-Signature: 1529923080676:2414335463 X-MC-Ingress-Time: 1529923080676 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id F05176328D; Mon, 25 Jun 2018 10:37:52 +0000 (UTC) From: Icenowy Zheng To: Jagan Teki , Maxime Ripard , Chen-Yu Tsai Date: Mon, 25 Jun 2018 18:37:10 +0800 Message-Id: <20180625103723.24760-1-icenowy@aosc.io> Cc: u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [PATCH 00/13] Allwinner H6 support (w/ SPL) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch trys to add support for Allwinner H6 SoC to U-Boot. Allwinner H6 is a quite new Allwinner SoC, with several parts changed a lot (memory map, DRAM controller, CCU, so on). The position which SPL will be loaded (SRAM A1) also changed to 0x20000. The Pine H64 board support comes with this patchset, as this is the first H6 board that I can get (being early bird). Icenowy Zheng (13): sunxi: change SUNXI_HIGH_SRAM option to SUNXI_SRAM_ADDRESS sunxi: add basical memory map definitions of H6 SoC sunxi: change RMR64's RVBAR address for H6 sunxi: change ATF position for H6 sunxi: add config for SPL at 0x20000 on H6 sunxi: change GIC address on H6 sunxi: add clock code for H6 sunxi: use sun6i-style watchdog for H6 sunxi: add UART0 setup for H6 sunxi: add MMC support for H6 sunxi: add DRAM support to H6 sunxi: add support for Allwinner H6 SoC sunxi: add support for Pine H64 board arch/arm/dts/Makefile | 2 + arch/arm/dts/sun50i-h6-pine-h64.dts | 64 ++ arch/arm/dts/sun50i-h6.dtsi | 140 ++++ arch/arm/include/asm/arch-sunxi/boot0.h | 4 + arch/arm/include/asm/arch-sunxi/clock.h | 2 + .../include/asm/arch-sunxi/clock_sun50i_h6.h | 320 ++++++++ arch/arm/include/asm/arch-sunxi/cpu.h | 2 + .../include/asm/arch-sunxi/cpu_sun50i_h6.h | 73 ++ arch/arm/include/asm/arch-sunxi/dram.h | 2 + .../include/asm/arch-sunxi/dram_sun50i_h6.h | 276 +++++++ arch/arm/include/asm/arch-sunxi/gpio.h | 1 + arch/arm/include/asm/arch-sunxi/mmc.h | 2 +- arch/arm/include/asm/arch-sunxi/spl.h | 6 +- arch/arm/include/asm/arch-sunxi/timer.h | 2 +- arch/arm/mach-sunxi/Kconfig | 37 +- arch/arm/mach-sunxi/Makefile | 2 + arch/arm/mach-sunxi/board.c | 6 +- arch/arm/mach-sunxi/clock_sun50i_h6.c | 94 +++ arch/arm/mach-sunxi/cpu_info.c | 2 + arch/arm/mach-sunxi/dram_sun50i_h6.c | 708 ++++++++++++++++++ arch/arm/mach-sunxi/rmr_switch.S | 6 + board/sunxi/MAINTAINERS | 5 + board/sunxi/board.c | 7 + board/sunxi/mksunxi_fit_atf.sh | 10 +- common/spl/Kconfig | 2 +- configs/pine_h64_defconfig | 15 + drivers/mmc/sunxi_mmc.c | 13 +- include/configs/sun50i.h | 5 + include/configs/sunxi-common.h | 24 +- 29 files changed, 1802 insertions(+), 30 deletions(-) create mode 100644 arch/arm/dts/sun50i-h6-pine-h64.dts create mode 100644 arch/arm/dts/sun50i-h6.dtsi create mode 100644 arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h create mode 100644 arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h create mode 100644 arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h create mode 100644 arch/arm/mach-sunxi/clock_sun50i_h6.c create mode 100644 arch/arm/mach-sunxi/dram_sun50i_h6.c create mode 100644 configs/pine_h64_defconfig