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[U-Boot,0/6] Add support for loading FPGA bitstream

Message ID 1546157627-45489-1-git-send-email-tien.fong.chee@intel.com
Headers show
Series Add support for loading FPGA bitstream | expand

Message

Chee, Tien Fong Dec. 30, 2018, 8:13 a.m. UTC 
From: Tien Fong Chee <tien.fong.chee@intel.com>

These series of patches enable peripheral bitstream being programmed into FPGA
to get the DDR up running. This's also called early IO release, because the
peripheral bitstream is only initializing FPGA IOs, PLL, IO48 and DDR.

Once DDR is up running, core bitstream from MMC which contains user FPGA
design would be loaded into DDR location. socfpga loadfs would be called to
program core bitstream into FPGA and entering user mode.

Lastly, u-boot-dtb.img from MMC FAT partition would be loaded to DDR, and up
running from there.

For this whole mechanism to work, the SDMMC flash layout would be designed as
shown in below:

RAW partition:
1. spl_w_dtb-mkpimage.bin
mkpimage -hv 1 -o spl/spl_w_dtb-mkpimage.bin spl/u-boot-spl-dtb.bin
 spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin

FAT partition contains:
Bitstreams
----------
Early IO release method is recommended for the sake of performance, improve
up to 86% compare to full RBF.

1. ghrd_10as066n2.periph.rbf.mkimage
mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
 ghrd_10as066n2.periph.rbf ghrd_10as066n2.periph.rbf.mkimage

2. ghrd_10as066n2.core.rbf.mkimage
mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
 ghrd_10as066n2.core.rbf ghrd_10as066n2.core.rbf.mkimage

OR

1. ghrd_10as066n2.rbf.mkimage (full RBF)
mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
 ghrd_10as066n2.rbf ghrd_10as066n2.rbf.mkimage

U-Boot image
------------
3. u-boot-dtb.img

For the testing purpose, these two patches are required to apply 1st before
applying this series of patches.
1. [U-Boot] [PATCH] misc: fs_loader: Switching private data allocation to DM
   auto allocation
   https://www.mail-archive.com/u-boot@lists.denx.de/msg308954.html
   Reviewed-by: Simon Glass <s...@chromium.org>

2. [U-Boot] [PATCH v2] Add support for initializing MMC
   https://www.mail-archive.com/u-boot@lists.denx.de/msg310532.html
   Version 2 under review.

This series is working on top of u-boot.git -
 http://git.denx.de/u-boot.git .

Marek Vasut (1):
  ARM: socfpga: Synchronize the configuration for A10 SoCDK

Tien Fong Chee (5):
  ARM: socfpga: Description on FPGA bitstream type and file name for
    Arria 10
  ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
  ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK
  ARM: dts: socfpga: Add missing SDMMC reset
  spl : socfpga: Implement fpga bitstream loading with socfpga loadfs

 arch/arm/dts/socfpga_arria10.dtsi                  |    1 +
 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts       |   18 +
 .../include/mach/fpga_manager_arria10.h            |   40 ++-
 arch/arm/mach-socfpga/spl_a10.c                    |   46 +++-
 configs/socfpga_arria10_defconfig                  |   46 ++-
 .../fpga/altera-socfpga-a10-fpga-mgr.txt           |   21 +
 drivers/fpga/Kconfig                               |    9 +
 drivers/fpga/socfpga_arria10.c                     |  396 +++++++++++++++++++-
 8 files changed, 558 insertions(+), 19 deletions(-)

Comments

Marek Vasut Dec. 30, 2018, 3:44 p.m. UTC | #1 
On 12/30/18 9:13 AM, tien.fong.chee@intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
> 
> These series of patches enable peripheral bitstream being programmed into FPGA
> to get the DDR up running. This's also called early IO release, because the
> peripheral bitstream is only initializing FPGA IOs, PLL, IO48 and DDR.
> 
> Once DDR is up running, core bitstream from MMC which contains user FPGA
> design would be loaded into DDR location. socfpga loadfs would be called to
> program core bitstream into FPGA and entering user mode.
> 
> Lastly, u-boot-dtb.img from MMC FAT partition would be loaded to DDR, and up
> running from there.
> 
> For this whole mechanism to work, the SDMMC flash layout would be designed as
> shown in below:
> 
> RAW partition:
> 1. spl_w_dtb-mkpimage.bin
> mkpimage -hv 1 -o spl/spl_w_dtb-mkpimage.bin spl/u-boot-spl-dtb.bin
>  spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin
> 
> FAT partition contains:
> Bitstreams
> ----------
> Early IO release method is recommended for the sake of performance, improve
> up to 86% compare to full RBF.
> 
> 1. ghrd_10as066n2.periph.rbf.mkimage
> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
>  ghrd_10as066n2.periph.rbf ghrd_10as066n2.periph.rbf.mkimage
> 
> 2. ghrd_10as066n2.core.rbf.mkimage
> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
>  ghrd_10as066n2.core.rbf ghrd_10as066n2.core.rbf.mkimage
> 
> OR
> 
> 1. ghrd_10as066n2.rbf.mkimage (full RBF)
> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\" -d
>  ghrd_10as066n2.rbf ghrd_10as066n2.rbf.mkimage
> 
> U-Boot image
> ------------
> 3. u-boot-dtb.img
> 
> For the testing purpose, these two patches are required to apply 1st before
> applying this series of patches.
> 1. [U-Boot] [PATCH] misc: fs_loader: Switching private data allocation to DM
>    auto allocation
>    https://www.mail-archive.com/u-boot@lists.denx.de/msg308954.html
>    Reviewed-by: Simon Glass <s...@chromium.org>
> 
> 2. [U-Boot] [PATCH v2] Add support for initializing MMC
>    https://www.mail-archive.com/u-boot@lists.denx.de/msg310532.html
>    Version 2 under review.

The above should be made into documentation, since cover letters are
dropped.
Chee, Tien Fong Jan. 1, 2019, 2:52 a.m. UTC | #2 
On Sun, 2018-12-30 at 16:44 +0100, Marek Vasut wrote:
> On 12/30/18 9:13 AM, tien.fong.chee@intel.com wrote:
> > 
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > 
> > These series of patches enable peripheral bitstream being
> > programmed into FPGA
> > to get the DDR up running. This's also called early IO release,
> > because the
> > peripheral bitstream is only initializing FPGA IOs, PLL, IO48 and
> > DDR.
> > 
> > Once DDR is up running, core bitstream from MMC which contains user
> > FPGA
> > design would be loaded into DDR location. socfpga loadfs would be
> > called to
> > program core bitstream into FPGA and entering user mode.
> > 
> > Lastly, u-boot-dtb.img from MMC FAT partition would be loaded to
> > DDR, and up
> > running from there.
> > 
> > For this whole mechanism to work, the SDMMC flash layout would be
> > designed as
> > shown in below:
> > 
> > RAW partition:
> > 1. spl_w_dtb-mkpimage.bin
> > mkpimage -hv 1 -o spl/spl_w_dtb-mkpimage.bin spl/u-boot-spl-dtb.bin
> >  spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-
> > dtb.bin
> > 
> > FAT partition contains:
> > Bitstreams
> > ----------
> > Early IO release method is recommended for the sake of performance,
> > improve
> > up to 86% compare to full RBF.
> > 
> > 1. ghrd_10as066n2.periph.rbf.mkimage
> > mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\"
> > -d
> >  ghrd_10as066n2.periph.rbf ghrd_10as066n2.periph.rbf.mkimage
> > 
> > 2. ghrd_10as066n2.core.rbf.mkimage
> > mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\"
> > -d
> >  ghrd_10as066n2.core.rbf ghrd_10as066n2.core.rbf.mkimage
> > 
> > OR
> > 
> > 1. ghrd_10as066n2.rbf.mkimage (full RBF)
> > mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\"
> > -d
> >  ghrd_10as066n2.rbf ghrd_10as066n2.rbf.mkimage
> > 
> > U-Boot image
> > ------------
> > 3. u-boot-dtb.img
> > 
> > For the testing purpose, these two patches are required to apply
> > 1st before
> > applying this series of patches.
> > 1. [U-Boot] [PATCH] misc: fs_loader: Switching private data
> > allocation to DM
> >    auto allocation
> >    https://www.mail-archive.com/u-boot@lists.denx.de/msg308954.html
> >    Reviewed-by: Simon Glass <s...@chromium.org>
> > 
> > 2. [U-Boot] [PATCH v2] Add support for initializing MMC
> >    https://www.mail-archive.com/u-boot@lists.denx.de/msg310532.html
> >    Version 2 under review.
> The above should be made into documentation, since cover letters are
> dropped.
Happy new year Marek.

Yeah, the document would be sent out once the implementation is
finalized. Hence, we need your mercy and help to get this done :-P,
just kidding.
>
Marek Vasut Jan. 1, 2019, 8:36 p.m. UTC | #3 
On 1/1/19 3:52 AM, Chee, Tien Fong wrote:
> On Sun, 2018-12-30 at 16:44 +0100, Marek Vasut wrote:
>> On 12/30/18 9:13 AM, tien.fong.chee@intel.com wrote:
>>>
>>> From: Tien Fong Chee <tien.fong.chee@intel.com>
>>>
>>> These series of patches enable peripheral bitstream being
>>> programmed into FPGA
>>> to get the DDR up running. This's also called early IO release,
>>> because the
>>> peripheral bitstream is only initializing FPGA IOs, PLL, IO48 and
>>> DDR.
>>>
>>> Once DDR is up running, core bitstream from MMC which contains user
>>> FPGA
>>> design would be loaded into DDR location. socfpga loadfs would be
>>> called to
>>> program core bitstream into FPGA and entering user mode.
>>>
>>> Lastly, u-boot-dtb.img from MMC FAT partition would be loaded to
>>> DDR, and up
>>> running from there.
>>>
>>> For this whole mechanism to work, the SDMMC flash layout would be
>>> designed as
>>> shown in below:
>>>
>>> RAW partition:
>>> 1. spl_w_dtb-mkpimage.bin
>>> mkpimage -hv 1 -o spl/spl_w_dtb-mkpimage.bin spl/u-boot-spl-dtb.bin
>>>  spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-
>>> dtb.bin
>>>
>>> FAT partition contains:
>>> Bitstreams
>>> ----------
>>> Early IO release method is recommended for the sake of performance,
>>> improve
>>> up to 86% compare to full RBF.
>>>
>>> 1. ghrd_10as066n2.periph.rbf.mkimage
>>> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\"
>>> -d
>>>  ghrd_10as066n2.periph.rbf ghrd_10as066n2.periph.rbf.mkimage
>>>
>>> 2. ghrd_10as066n2.core.rbf.mkimage
>>> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\"
>>> -d
>>>  ghrd_10as066n2.core.rbf ghrd_10as066n2.core.rbf.mkimage
>>>
>>> OR
>>>
>>> 1. ghrd_10as066n2.rbf.mkimage (full RBF)
>>> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n \"RBF\"
>>> -d
>>>  ghrd_10as066n2.rbf ghrd_10as066n2.rbf.mkimage
>>>
>>> U-Boot image
>>> ------------
>>> 3. u-boot-dtb.img
>>>
>>> For the testing purpose, these two patches are required to apply
>>> 1st before
>>> applying this series of patches.
>>> 1. [U-Boot] [PATCH] misc: fs_loader: Switching private data
>>> allocation to DM
>>>    auto allocation
>>>    https://www.mail-archive.com/u-boot@lists.denx.de/msg308954.html
>>>    Reviewed-by: Simon Glass <s...@chromium.org>
>>>
>>> 2. [U-Boot] [PATCH v2] Add support for initializing MMC
>>>    https://www.mail-archive.com/u-boot@lists.denx.de/msg310532.html
>>>    Version 2 under review.
>> The above should be made into documentation, since cover letters are
>> dropped.
> Happy new year Marek.

Happy New Year to you too.

> Yeah, the document would be sent out once the implementation is
> finalized. Hence, we need your mercy and help to get this done :-P,
> just kidding.

I hope you can wrap this into V7 .
Chee, Tien Fong Jan. 3, 2019, 5:33 a.m. UTC | #4 
On Tue, 2019-01-01 at 21:36 +0100, Marek Vasut wrote:
> On 1/1/19 3:52 AM, Chee, Tien Fong wrote:
> > 
> > On Sun, 2018-12-30 at 16:44 +0100, Marek Vasut wrote:
> > > 
> > > On 12/30/18 9:13 AM, tien.fong.chee@intel.com wrote:
> > > > 
> > > > 
> > > > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > 
> > > > These series of patches enable peripheral bitstream being
> > > > programmed into FPGA
> > > > to get the DDR up running. This's also called early IO release,
> > > > because the
> > > > peripheral bitstream is only initializing FPGA IOs, PLL, IO48
> > > > and
> > > > DDR.
> > > > 
> > > > Once DDR is up running, core bitstream from MMC which contains
> > > > user
> > > > FPGA
> > > > design would be loaded into DDR location. socfpga loadfs would
> > > > be
> > > > called to
> > > > program core bitstream into FPGA and entering user mode.
> > > > 
> > > > Lastly, u-boot-dtb.img from MMC FAT partition would be loaded
> > > > to
> > > > DDR, and up
> > > > running from there.
> > > > 
> > > > For this whole mechanism to work, the SDMMC flash layout would
> > > > be
> > > > designed as
> > > > shown in below:
> > > > 
> > > > RAW partition:
> > > > 1. spl_w_dtb-mkpimage.bin
> > > > mkpimage -hv 1 -o spl/spl_w_dtb-mkpimage.bin spl/u-boot-spl-
> > > > dtb.bin
> > > >  spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-
> > > > dtb.bin
> > > > 
> > > > FAT partition contains:
> > > > Bitstreams
> > > > ----------
> > > > Early IO release method is recommended for the sake of
> > > > performance,
> > > > improve
> > > > up to 86% compare to full RBF.
> > > > 
> > > > 1. ghrd_10as066n2.periph.rbf.mkimage
> > > > mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n
> > > > \"RBF\"
> > > > -d
> > > >  ghrd_10as066n2.periph.rbf ghrd_10as066n2.periph.rbf.mkimage
> > > > 
> > > > 2. ghrd_10as066n2.core.rbf.mkimage
> > > > mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n
> > > > \"RBF\"
> > > > -d
> > > >  ghrd_10as066n2.core.rbf ghrd_10as066n2.core.rbf.mkimage
> > > > 
> > > > OR
> > > > 
> > > > 1. ghrd_10as066n2.rbf.mkimage (full RBF)
> > > > mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n
> > > > \"RBF\"
> > > > -d
> > > >  ghrd_10as066n2.rbf ghrd_10as066n2.rbf.mkimage
> > > > 
> > > > U-Boot image
> > > > ------------
> > > > 3. u-boot-dtb.img
> > > > 
> > > > For the testing purpose, these two patches are required to
> > > > apply
> > > > 1st before
> > > > applying this series of patches.
> > > > 1. [U-Boot] [PATCH] misc: fs_loader: Switching private data
> > > > allocation to DM
> > > >    auto allocation
> > > >    https://www.mail-archive.com/u-boot@lists.denx.de/msg308954.
> > > > html
> > > >    Reviewed-by: Simon Glass <s...@chromium.org>
> > > > 
> > > > 2. [U-Boot] [PATCH v2] Add support for initializing MMC
> > > >    https://www.mail-archive.com/u-boot@lists.denx.de/msg310532.
> > > > html
> > > >    Version 2 under review.
> > > The above should be made into documentation, since cover letters
> > > are
> > > dropped.
> > Happy new year Marek.
> Happy New Year to you too.
> 
> > 
> > Yeah, the document would be sent out once the implementation is
> > finalized. Hence, we need your mercy and help to get this done :-P,
> > just kidding.
> I hope you can wrap this into V7 .
Sure.
>
Marek Vasut Jan. 3, 2019, 8:16 p.m. UTC | #5 
On 1/3/19 6:33 AM, Chee, Tien Fong wrote:
> On Tue, 2019-01-01 at 21:36 +0100, Marek Vasut wrote:
>> On 1/1/19 3:52 AM, Chee, Tien Fong wrote:
>>>
>>> On Sun, 2018-12-30 at 16:44 +0100, Marek Vasut wrote:
>>>>
>>>> On 12/30/18 9:13 AM, tien.fong.chee@intel.com wrote:
>>>>>
>>>>>
>>>>> From: Tien Fong Chee <tien.fong.chee@intel.com>
>>>>>
>>>>> These series of patches enable peripheral bitstream being
>>>>> programmed into FPGA
>>>>> to get the DDR up running. This's also called early IO release,
>>>>> because the
>>>>> peripheral bitstream is only initializing FPGA IOs, PLL, IO48
>>>>> and
>>>>> DDR.
>>>>>
>>>>> Once DDR is up running, core bitstream from MMC which contains
>>>>> user
>>>>> FPGA
>>>>> design would be loaded into DDR location. socfpga loadfs would
>>>>> be
>>>>> called to
>>>>> program core bitstream into FPGA and entering user mode.
>>>>>
>>>>> Lastly, u-boot-dtb.img from MMC FAT partition would be loaded
>>>>> to
>>>>> DDR, and up
>>>>> running from there.
>>>>>
>>>>> For this whole mechanism to work, the SDMMC flash layout would
>>>>> be
>>>>> designed as
>>>>> shown in below:
>>>>>
>>>>> RAW partition:
>>>>> 1. spl_w_dtb-mkpimage.bin
>>>>> mkpimage -hv 1 -o spl/spl_w_dtb-mkpimage.bin spl/u-boot-spl-
>>>>> dtb.bin
>>>>>  spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-
>>>>> dtb.bin
>>>>>
>>>>> FAT partition contains:
>>>>> Bitstreams
>>>>> ----------
>>>>> Early IO release method is recommended for the sake of
>>>>> performance,
>>>>> improve
>>>>> up to 86% compare to full RBF.
>>>>>
>>>>> 1. ghrd_10as066n2.periph.rbf.mkimage
>>>>> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n
>>>>> \"RBF\"
>>>>> -d
>>>>>  ghrd_10as066n2.periph.rbf ghrd_10as066n2.periph.rbf.mkimage
>>>>>
>>>>> 2. ghrd_10as066n2.core.rbf.mkimage
>>>>> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n
>>>>> \"RBF\"
>>>>> -d
>>>>>  ghrd_10as066n2.core.rbf ghrd_10as066n2.core.rbf.mkimage
>>>>>
>>>>> OR
>>>>>
>>>>> 1. ghrd_10as066n2.rbf.mkimage (full RBF)
>>>>> mkimage -A arm -T firmware -C none -O u-boot -a 0 -e 0 -n
>>>>> \"RBF\"
>>>>> -d
>>>>>  ghrd_10as066n2.rbf ghrd_10as066n2.rbf.mkimage
>>>>>
>>>>> U-Boot image
>>>>> ------------
>>>>> 3. u-boot-dtb.img
>>>>>
>>>>> For the testing purpose, these two patches are required to
>>>>> apply
>>>>> 1st before
>>>>> applying this series of patches.
>>>>> 1. [U-Boot] [PATCH] misc: fs_loader: Switching private data
>>>>> allocation to DM
>>>>>    auto allocation
>>>>>    https://www.mail-archive.com/u-boot@lists.denx.de/msg308954.
>>>>> html
>>>>>    Reviewed-by: Simon Glass <s...@chromium.org>
>>>>>
>>>>> 2. [U-Boot] [PATCH v2] Add support for initializing MMC
>>>>>    https://www.mail-archive.com/u-boot@lists.denx.de/msg310532.
>>>>> html
>>>>>    Version 2 under review.
>>>> The above should be made into documentation, since cover letters
>>>> are
>>>> dropped.
>>> Happy new year Marek.
>> Happy New Year to you too.
>>
>>>
>>> Yeah, the document would be sent out once the implementation is
>>> finalized. Hence, we need your mercy and help to get this done :-P,
>>> just kidding.
>> I hope you can wrap this into V7 .
> Sure.

Thanks