From patchwork Wed Mar 29 10:24:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roberto Sassu X-Patchwork-Id: 744706 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vtP8G1jXBz9s1y for ; Wed, 29 Mar 2017 21:27:10 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=sfs-ml-3.v29.ch3.sourceforge.com) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1ctAoh-0008EM-Jg; Wed, 29 Mar 2017 10:27:03 +0000 Received: from sog-mx-4.v43.ch3.sourceforge.com ([172.29.43.194] helo=mx.sourceforge.net) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1ctAog-0008E6-Ks; Wed, 29 Mar 2017 10:27:02 +0000 Received-SPF: pass (sog-mx-4.v43.ch3.sourceforge.com: domain of huawei.com designates 194.213.3.17 as permitted sender) client-ip=194.213.3.17; envelope-from=roberto.sassu@huawei.com; helo=lhrrgout.huawei.com; Received: from lhrrgout.huawei.com ([194.213.3.17]) by sog-mx-4.v43.ch3.sourceforge.com with esmtps (TLSv1:RC4-SHA:128) (Exim 4.76) id 1ctAof-00058v-Kv; Wed, 29 Mar 2017 10:27:02 +0000 Received: from 172.18.7.190 (EHLO lhreml705-cah.china.huawei.com) ([172.18.7.190]) by lhrrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DDT38533; Wed, 29 Mar 2017 10:26:55 +0000 (GMT) Received: from sgx1.huawei.com (10.204.66.17) by smtpsuk.huawei.com (10.201.108.46) with Microsoft SMTP Server (TLS) id 14.3.301.0; Wed, 29 Mar 2017 11:26:47 +0100 From: Roberto Sassu To: Date: Wed, 29 Mar 2017 12:24:51 +0200 Message-ID: <20170329102452.32212-4-roberto.sassu@huawei.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170329102452.32212-1-roberto.sassu@huawei.com> References: <20170329102452.32212-1-roberto.sassu@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.204.66.17] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020202.58DB8BEF.00B7, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 6245b630cffce4dabe0f5c0bb88479db X-Spam-Score: -1.5 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain X-Headers-End: 1ctAof-00058v-Kv Cc: linux-ima-devel@lists.sourceforge.net Subject: [tpmdd-devel] [PATCH 3/4] tpm: introduce tpm_pcr_algorithms() X-BeenThere: tpmdd-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Tpm Device Driver maintainance List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: tpmdd-devel-bounces@lists.sourceforge.net Return the algorithms supported by the TPM. The limit (TPM_ACTIVE_BANKS_MAX) has been exported to include/linux/tpm.h. Signed-off-by: Roberto Sassu --- drivers/char/tpm/tpm-interface.c | 39 +++++++++++++++++++++++++++++++++++++++ drivers/char/tpm/tpm.h | 2 +- include/linux/tpm.h | 8 ++++++++ 3 files changed, 48 insertions(+), 1 deletion(-) diff --git a/drivers/char/tpm/tpm-interface.c b/drivers/char/tpm/tpm-interface.c index 0b6cb87..44e7c99 100644 --- a/drivers/char/tpm/tpm-interface.c +++ b/drivers/char/tpm/tpm-interface.c @@ -876,6 +876,45 @@ int tpm_pcr_extend(u32 chip_num, int pcr_idx, const u8 *hash) EXPORT_SYMBOL_GPL(tpm_pcr_extend); /** + * tpm_pcr_algorithms - get TPM IDs of active PCR banks algorithms + * @chip_num: tpm idx # or ANY + * @algorithms: array of TPM IDs + * @algo_num: size of array + * + * Returns < 0 on error, and the number of active PCR banks on success. + */ +int tpm_pcr_algorithms(u32 chip_num, u32 count, + enum tpm2_algorithms *algorithms) +{ + struct tpm_chip *chip; + int rc = -ENODEV; + int i; + + chip = tpm_chip_find_get(chip_num); + if (chip == NULL) + return rc; + + if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) + goto out; + + for (i = 0; i < ARRAY_SIZE(chip->active_banks) && + chip->active_banks[i] != TPM2_ALG_ERROR; i++) { + if (i >= count) { + rc = -EINVAL; + goto out; + } + + algorithms[i] = chip->active_banks[i]; + } + + rc = i; +out: + tpm_put_ops(chip); + return rc; +} +EXPORT_SYMBOL_GPL(tpm_pcr_algorithms); + +/** * tpm_do_selftest - have the TPM continue its selftest and wait until it * can receive further commands * @chip: TPM chip to use diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h index e20f3ae..f15279b 100644 --- a/drivers/char/tpm/tpm.h +++ b/drivers/char/tpm/tpm.h @@ -183,7 +183,7 @@ struct tpm_chip { const struct attribute_group *groups[3]; unsigned int groups_cnt; - u16 active_banks[7]; + u16 active_banks[TPM_ACTIVE_BANKS_MAX]; #ifdef CONFIG_ACPI acpi_handle acpi_dev_handle; char ppi_version[TPM_PPI_VERSION_LEN + 1]; diff --git a/include/linux/tpm.h b/include/linux/tpm.h index 14b4a42..6552e43 100644 --- a/include/linux/tpm.h +++ b/include/linux/tpm.h @@ -23,6 +23,7 @@ #define __LINUX_TPM_H__ #define TPM_DIGEST_SIZE 20 /* Max TPM v1.2 PCR size */ +#define TPM_ACTIVE_BANKS_MAX 7 /* Max num of active banks for TPM 2.0 */ /* * Chip num is this value or a valid tpm idx @@ -69,6 +70,8 @@ extern enum tpm2_algorithms tpm2_pcr_algo_from_crypto(enum hash_algo crypto_id); extern int tpm_is_tpm2(u32 chip_num); extern int tpm_pcr_read(u32 chip_num, int pcr_idx, u8 *res_buf); extern int tpm_pcr_extend(u32 chip_num, int pcr_idx, const u8 *hash); +extern int tpm_pcr_algorithms(u32 chip_num, u32 count, + enum tpm2_algorithms *algorithms); extern int tpm_send(u32 chip_num, void *cmd, size_t buflen); extern int tpm_get_random(u32 chip_num, u8 *data, size_t max); extern int tpm_seal_trusted(u32 chip_num, @@ -97,6 +100,11 @@ static inline int tpm_pcr_read(u32 chip_num, int pcr_idx, u8 *res_buf) { static inline int tpm_pcr_extend(u32 chip_num, int pcr_idx, const u8 *hash) { return -ENODEV; } +static inline int tpm_pcr_algorithms(u32 chip_num, u32 count, + enum tpm2_algorithms *algorithms) +{ + return -ENODEV; +} static inline int tpm_send(u32 chip_num, void *cmd, size_t buflen) { return -ENODEV; }