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[3/5] sparc64: Report the extended crypto capabilities

Message ID 20260929134353.3879030-4-stian@itx.no
State New
Headers show
Series sparc64: Report the M7 hardware capabilities | expand

Commit Message

Stian Halseth Sept. 29, 2026, 1:43 p.m. UTC 
crypto_hwcaps[] is indexed by CFR bit and stops at crc32c in bit 11. The
loops in cpucap_info() and report_crypto_hwcaps() are bounded by the
array, so a higher bit is read out of CFR and then discarded.

A SPARC M7 sets CFR bits 12 to 14. Name them.

  T7-1  CFR 0x7ffb  bits 0-14 except kasumi, so 12-14 are set
  T4-1  CFR 0x0fff  bits 0-11, unchanged by this patch

Signed-off-by: Stian Halseth <stian@itx.no>
---
 arch/sparc/kernel/setup_64.c | 1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index d819ce65d1d44..71d30b3bf276f 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -393,6 +393,7 @@  static const char *hwcaps[] = {
 static const char *crypto_hwcaps[] = {
 	"aes", "des", "kasumi", "camellia", "md5", "sha1", "sha256",
 	"sha512", "mpmul", "montmul", "montsqr", "crc32c",
+	"xmpmul", "xmontmul", "xmontsqr",
 };
 
 void cpucap_info(struct seq_file *m)