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Wed, 4 Aug 2021 07:23:20 +0000 (GMT) Received: from hegdevasant.in.ibm.com (unknown [9.85.83.73]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 4 Aug 2021 07:23:20 +0000 (GMT) From: Vasant Hegde To: skiboot@lists.ozlabs.org Date: Wed, 4 Aug 2021 12:51:24 +0530 Message-Id: <20210804072137.1147875-47-hegdevasant@linux.vnet.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210804072137.1147875-1-hegdevasant@linux.vnet.ibm.com> References: <20210804072137.1147875-1-hegdevasant@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: KHYo0A74b9Ob-ZIIn1En2bKQbIFDJOEO X-Proofpoint-GUID: KHYo0A74b9Ob-ZIIn1En2bKQbIFDJOEO X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-08-04_02:2021-08-03, 2021-08-04 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxscore=0 malwarescore=0 clxscore=1015 mlxlogscore=837 phishscore=0 adultscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2108040036 Subject: [Skiboot] [PATCH v2 46/59] xive/p10: Tune max_entries_in_modified when split_mode is on X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Cédric Le Goater This reduces the number of entries currently modified in the ESB cache. Signed-off-by: Cédric Le Goater Signed-off-by: Vasant Hegde --- hw/xive2.c | 1 + include/xive2-regs.h | 1 + 2 files changed, 2 insertions(+) diff --git a/hw/xive2.c b/hw/xive2.c index 1ad1f138d..56b02fc67 100644 --- a/hw/xive2.c +++ b/hw/xive2.c @@ -1622,6 +1622,7 @@ static void xive_config_esb_cache(struct xive *x) if (xive_has_cap(x, CQ_XIVE_CAP_PHB_PQ_DISABLE)) { val |= VC_ESBC_CFG_SPLIT_MODE | VC_ESBC_CFG_HASH_ARRAY_ENABLE; + val = SETFIELD(VC_ESBC_CFG_MAX_ENTRIES_IN_MODIFIED, val, 0xE); xive_dbg(x, "ESB cache configured with split mode " "and hash array. VC_ESBC_CFG=%016llx\n", val); } else diff --git a/include/xive2-regs.h b/include/xive2-regs.h index c2ed265f6..1f7a3e721 100644 --- a/include/xive2-regs.h +++ b/include/xive2-regs.h @@ -233,6 +233,7 @@ #define VC_ESBC_CFG_HASH_ARRAY_ENABLE PPC_BIT(40) #define VC_ESBC_CFG_HASH_STORE_MODE PPC_BITMASK(41,42) #define VC_ESBC_CFG_SPLIT_MODE PPC_BIT(56) +#define VC_ESBC_CFG_MAX_ENTRIES_IN_MODIFIED PPC_BITMASK(59,63) /* EASC flush control register */ #define X_VC_EASC_FLUSH_CTRL 0x160