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Mon, 19 Jul 2021 13:21:19 +0000 (GMT) Received: from hegdevasant.in.ibm.com (unknown [9.85.86.230]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 19 Jul 2021 13:21:19 +0000 (GMT) From: Vasant Hegde To: skiboot@lists.ozlabs.org Date: Mon, 19 Jul 2021 18:49:36 +0530 Message-Id: <20210719132012.150948-26-hegdevasant@linux.vnet.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210719132012.150948-1-hegdevasant@linux.vnet.ibm.com> References: <20210719132012.150948-1-hegdevasant@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: tvEtA5BkVq91KYNvGaTSEXGRjqMkOknb X-Proofpoint-ORIG-GUID: tvEtA5BkVq91KYNvGaTSEXGRjqMkOknb X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-19_05:2021-07-19, 2021-07-19 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=904 clxscore=1015 spamscore=0 adultscore=0 malwarescore=0 lowpriorityscore=0 phishscore=0 impostorscore=0 priorityscore=1501 mlxscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2107190076 Subject: [Skiboot] [PATCH 25/61] VAS: Do not set foreign address enable for VAS/NX RMA BAR on P10 X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haren Myneni Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Haren Myneni From section 1.3.3.1 in VAS workbook, RA(0:12) = 0's for VAS/NX RMA BAR. It means foreign address enable bit (RA(11) should be 0 for RMA VAR. But this bit has to be set for paste base address which is used for COPY/PASTE. Signed-off-by: Haren Myneni Signed-off-by: Vasant Hegde --- hw/vas.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/hw/vas.c b/hw/vas.c index 6a7bd1c10..0dbe0bcda 100644 --- a/hw/vas.c +++ b/hw/vas.c @@ -266,6 +266,9 @@ static void p9_get_rma_bar(int chipid, uint64_t *val) * * Thus the paste address for window id 4 is 0x00100000_00040400 and * the _base_ paste address for Node 0 Chip 0 is 0x00100000_00000000. + * + * Note: Bit 11 (Foreign Address Enable) is set only for paste base address. + * Not for VAS/NX RMA BAR. RA(0:12) = 0 for VAS/NX RMA BAR. */ static void get_rma_bar(struct proc_chip *chip, uint64_t *val) @@ -273,7 +276,6 @@ static void get_rma_bar(struct proc_chip *chip, uint64_t *val) uint64_t v; v = 0ULL; - v = SETFIELD(RMA_FOREIGN_ADDR_ENABLE, v, 1); v = SETFIELD(RMA_TOPOLOGY_INDEX, v, chip->primary_topology); *val = v; @@ -361,6 +363,12 @@ static inline void get_paste_bar(int chipid, uint64_t *start, uint64_t *len) return; get_rma_bar(chip, &val); + + /* + * RA(11) (Foreign Address Enable) is set only for paste + * base address. + */ + val = SETFIELD(RMA_FOREIGN_ADDR_ENABLE, val, 1); } *start = val;