@@ -133,6 +133,9 @@ static void init_chip(struct dt_node *dn)
if (lc)
chip->loc_code = strdup(lc);
+ chip->primary_topology = dt_prop_get_u32_def(dn,
+ "ibm,primary-topology-index", 0xffffffff);
+
prlog(PR_INFO, "CHIP: Initialised chip %d from %s\n", id, dn->name);
chips[id] = chip;
}
@@ -688,6 +688,18 @@ static bool add_xscom_sppcrd(uint64_t xscom_base)
be32_to_cpu(cinfo->sw_xstop_fir_scom),
fir_bit);
}
+
+ if (proc_gen >= proc_gen_p10) {
+ uint8_t primary_loc = cinfo->primary_topology_loc;
+
+ if (primary_loc >= CHIP_MAX_TOPOLOGY_ENTRIES) {
+ prerror("XSCOM: Invalid primary topology index %d\n",
+ primary_loc);
+ continue;
+ }
+ dt_add_property_cells(np, "ibm,primary-topology-index",
+ cinfo->topology_id_table[primary_loc]);
+ }
}
return i > 0;
@@ -1092,7 +1092,10 @@ struct sppcrd_chip_info {
/* From latest version (possibly 0x21 and later) */
__be32 sw_xstop_fir_scom;
uint8_t sw_xstop_fir_bitpos;
- uint8_t reserved_1[3];
+ /* Latest version for P10 */
+#define CHIP_MAX_TOPOLOGY_ENTRIES 32
+ uint8_t topology_id_table[CHIP_MAX_TOPOLOGY_ENTRIES];
+ uint8_t primary_topology_loc; /* Index in topology_id_table */
} __packed;
/* Idata index 1 : Chip TOD */
@@ -277,6 +277,9 @@ struct proc_chip {
/* Used during OCC init */
bool ex_present;
+
+ /* Used by hw/vas.c on p10 */
+ uint32_t primary_topology;
};
extern uint32_t pir_to_chip_id(uint32_t pir);