From patchwork Wed Sep 18 01:11:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1163636 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46Y25J1CpPz9s4Y for ; Wed, 18 Sep 2019 11:12:20 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="pvCji2nR"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46Y25H6TX9zF44n for ; Wed, 18 Sep 2019 11:12:19 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::444; helo=mail-pf1-x444.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="pvCji2nR"; dkim-atps=neutral Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46Y2515yQxzF444 for ; Wed, 18 Sep 2019 11:12:05 +1000 (AEST) Received: by mail-pf1-x444.google.com with SMTP id a2so3220862pfo.10 for ; Tue, 17 Sep 2019 18:12:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gSenY4p4q4JJTokLLjXpSY1/iYWB50upleTyzKyKlmo=; b=pvCji2nRschVMOC3FGfMJMGkbwe4LC6nYYpQL/2xqrbk2LDA8AJ732tyhlCA/+ORbO Ew10kH1pz5ivrgEw+Cy7VqK4qlBmifNvWEMIbgjj31bHgmkSv7qI2V20Vq26dg2svKAk hatsL67cnXaI9ElioyVZnict1/zxNbmQmVWDN5G9xSnxAkhacbWdh+ceiKUyytW9AYLu W9h2ODfl9f5MCCDSd/clbdPvmc6Jby1X0lPDP71oCt0O86Cb25DULgUllgCLEKUobVdx m5IwAP3FEF93dgg4Q+XHhrPpcIwTi6A/mEPbN1SvReG+i3bFDoQhzOvLOTH+DL8a5o1B S21g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gSenY4p4q4JJTokLLjXpSY1/iYWB50upleTyzKyKlmo=; b=tSy9f1+tJvlgdbXieRTX4nfEtJVgmId3A9JUJYaQX/zqJT72axzDy2xB10g9ubfhxw l4OM3rw84FCujIw6kToudnaOfZafjcToKxV96PVC5xZzALSD/n0FdDzMOleqYNmuWQas ck4kUQNDNSiS0YTlg1tkvCwIWlFxlZaBAC+AC3UVFUuhBkwyq/cHS008pNpYX9rAQQgO cmyJJ7vnRavJwtMQzmriMml0lDEy9jgrHj4/DLD/H0OODf6IjLx/dNZzF/n4E1gp4chh ULs1p5vS93cbPYeVlrOv2+9SYpgZkifbDjcf4eH8Ol+uNmkxGfQVkKYy79ZIJbUNleHY 2BsA== X-Gm-Message-State: APjAAAUefP7u6moB/vep2UP46uVYWyXfqcXOeVte21/S+3b4xGpWgeJP LFodTxACfjNtkgevVC0Zvvivnz2U X-Google-Smtp-Source: APXvYqyX4hwz/07DC0p4oeEmeBF6shOF5K/+t9KZBhlI5Rdk6IVpYqe/aahhh1SNeTQ9s4F4UY0Ovw== X-Received: by 2002:a17:90a:b001:: with SMTP id x1mr1036112pjq.114.1568769122313; Tue, 17 Sep 2019 18:12:02 -0700 (PDT) Received: from bobo.local0.net ([203.63.189.78]) by smtp.gmail.com with ESMTPSA id d5sm7286242pfa.180.2019.09.17.18.12.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Sep 2019 18:12:01 -0700 (PDT) From: Nicholas Piggin To: skiboot@lists.ozlabs.org Date: Wed, 18 Sep 2019 11:11:14 +1000 Message-Id: <20190918011114.21254-2-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20190918011114.21254-1-npiggin@gmail.com> References: <20190918011114.21254-1-npiggin@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 2/2] opal-api: add more endian conversions to API implementations X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Add missing endian conversions, sufficient at least to handle calls from a kernel booting on mambo with a little endian skiboot. Signed-off-by: Nicholas Piggin --- core/console.c | 12 +++---- core/interrupts.c | 8 +++-- core/pci-opal.c | 80 +++++++++++++++++++++++++++++++++++--------- core/powercap.c | 12 +++++-- core/psr.c | 12 +++++-- hw/fsp/fsp-console.c | 26 ++++++++------ hw/lpc-uart.c | 16 ++++----- hw/npu2-opencapi.c | 10 ++++-- hw/xscom.c | 19 +++++++++-- include/console.h | 6 ++-- 10 files changed, 146 insertions(+), 55 deletions(-) diff --git a/core/console.c b/core/console.c index 139ba4a97..9f93afe73 100644 --- a/core/console.c +++ b/core/console.c @@ -351,7 +351,7 @@ void memcons_add_properties(void) * complicated since they can come from the in-memory console (BML) or from the * internal skiboot console driver. */ -static int64_t dummy_console_write(int64_t term_number, int64_t *length, +static int64_t dummy_console_write(int64_t term_number, __be64 *length, const uint8_t *buffer) { if (term_number != 0) @@ -360,13 +360,13 @@ static int64_t dummy_console_write(int64_t term_number, int64_t *length, if (!opal_addr_valid(length) || !opal_addr_valid(buffer)) return OPAL_PARAMETER; - write(0, buffer, *length); + write(0, buffer, be64_to_cpu(*length)); return OPAL_SUCCESS; } static int64_t dummy_console_write_buffer_space(int64_t term_number, - int64_t *length) + __be64 *length) { if (term_number != 0) return OPAL_PARAMETER; @@ -375,12 +375,12 @@ static int64_t dummy_console_write_buffer_space(int64_t term_number, return OPAL_PARAMETER; if (length) - *length = INMEM_CON_OUT_LEN; + *length = cpu_to_be64(INMEM_CON_OUT_LEN); return OPAL_SUCCESS; } -static int64_t dummy_console_read(int64_t term_number, int64_t *length, +static int64_t dummy_console_read(int64_t term_number, __be64 *length, uint8_t *buffer) { if (term_number != 0) @@ -389,7 +389,7 @@ static int64_t dummy_console_read(int64_t term_number, int64_t *length, if (!opal_addr_valid(length) || !opal_addr_valid(buffer)) return OPAL_PARAMETER; - *length = read(0, buffer, *length); + *length = cpu_to_be64(read(0, buffer, *length)); opal_update_pending_evt(OPAL_EVENT_CONSOLE_INPUT, 0); return OPAL_SUCCESS; diff --git a/core/interrupts.c b/core/interrupts.c index b0c1da198..2f3e93f75 100644 --- a/core/interrupts.c +++ b/core/interrupts.c @@ -439,9 +439,11 @@ static int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority) } opal_call(OPAL_SET_XIVE, opal_set_xive, 3); -static int64_t opal_get_xive(uint32_t isn, uint16_t *server, uint8_t *priority) +static int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority) { struct irq_source *is = irq_find_source(isn); + uint16_t s; + int64_t ret; if (!opal_addr_valid(server)) return OPAL_PARAMETER; @@ -449,7 +451,9 @@ static int64_t opal_get_xive(uint32_t isn, uint16_t *server, uint8_t *priority) if (!is || !is->ops->get_xive) return OPAL_PARAMETER; - return is->ops->get_xive(is, isn, server, priority); + ret = is->ops->get_xive(is, isn, &s, priority); + *server = cpu_to_be16(s); + return ret; } opal_call(OPAL_GET_XIVE, opal_get_xive, 3); diff --git a/core/pci-opal.c b/core/pci-opal.c index 213a72565..e0ab3cf91 100644 --- a/core/pci-opal.c +++ b/core/pci-opal.c @@ -58,9 +58,36 @@ OPAL_PCICFG_ACCESS_WRITE(write_byte, write8, uint8_t) OPAL_PCICFG_ACCESS_WRITE(write_half_word, write16, uint16_t) OPAL_PCICFG_ACCESS_WRITE(write_word, write32, uint32_t) +static int64_t opal_pci_config_read_half_word_be(uint64_t phb_id, + uint64_t bus_dev_func, + uint64_t offset, + __be16 *data) +{ + uint16_t __data; + int64_t rc; + + rc = opal_pci_config_read_half_word(phb_id, bus_dev_func, offset, &__data); + *data = cpu_to_be16(__data); + return rc; +} + +static int64_t opal_pci_config_read_word_be(uint64_t phb_id, + uint64_t bus_dev_func, + uint64_t offset, + __be32 *data) +{ + uint32_t __data; + int64_t rc; + + rc = opal_pci_config_read_word(phb_id, bus_dev_func, offset, &__data); + *data = cpu_to_be32(__data); + return rc; +} + + opal_call(OPAL_PCI_CONFIG_READ_BYTE, opal_pci_config_read_byte, 4); -opal_call(OPAL_PCI_CONFIG_READ_HALF_WORD, opal_pci_config_read_half_word, 4); -opal_call(OPAL_PCI_CONFIG_READ_WORD, opal_pci_config_read_word, 4); +opal_call(OPAL_PCI_CONFIG_READ_HALF_WORD, opal_pci_config_read_half_word_be, 4); +opal_call(OPAL_PCI_CONFIG_READ_WORD, opal_pci_config_read_word_be, 4); opal_call(OPAL_PCI_CONFIG_WRITE_BYTE, opal_pci_config_write_byte, 4); opal_call(OPAL_PCI_CONFIG_WRITE_HALF_WORD, opal_pci_config_write_half_word, 4); opal_call(OPAL_PCI_CONFIG_WRITE_WORD, opal_pci_config_write_word, 4); @@ -87,10 +114,11 @@ void opal_pci_eeh_clear_evt(uint64_t phb_id) static int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number, uint8_t *freeze_state, - uint16_t *pci_error_type, - uint64_t *phb_status) + __be16 *pci_error_type, + __be64 *phb_status) { struct phb *phb = pci_get_phb(phb_id); + uint16_t __pci_error_type; int64_t rc; if (!opal_addr_valid(freeze_state) || !opal_addr_valid(pci_error_type) @@ -108,7 +136,8 @@ static int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number, phb_id, __func__); rc = phb->ops->eeh_freeze_status(phb, pe_number, freeze_state, - pci_error_type, NULL); + &__pci_error_type, NULL); + *pci_error_type = cpu_to_be16(__pci_error_type); phb_unlock(phb); return rc; @@ -371,9 +400,11 @@ opal_call(OPAL_PCI_SET_XIVE_PE, opal_pci_set_xive_pe, 3); static int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num, uint8_t msi_range, - uint32_t *msi_address, uint32_t *message_data) + __be32 *msi_address, __be32 *message_data) { struct phb *phb = pci_get_phb(phb_id); + uint32_t __msi_address; + uint32_t __message_data; int64_t rc; if (!opal_addr_valid(msi_address) || !opal_addr_valid(message_data)) @@ -385,18 +416,23 @@ static int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, return OPAL_UNSUPPORTED; phb_lock(phb); rc = phb->ops->get_msi_32(phb, mve_number, xive_num, msi_range, - msi_address, message_data); + &__msi_address, &__message_data); phb_unlock(phb); + *msi_address = cpu_to_be32(__msi_address); + *message_data = cpu_to_be32(__message_data); + return rc; } opal_call(OPAL_GET_MSI_32, opal_get_msi_32, 6); static int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num, uint8_t msi_range, - uint64_t *msi_address, uint32_t *message_data) + __be64 *msi_address, __be32 *message_data) { struct phb *phb = pci_get_phb(phb_id); + uint64_t __msi_address; + uint32_t __message_data; int64_t rc; if (!opal_addr_valid(msi_address) || !opal_addr_valid(message_data)) @@ -408,9 +444,12 @@ static int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number, return OPAL_UNSUPPORTED; phb_lock(phb); rc = phb->ops->get_msi_64(phb, mve_number, xive_num, msi_range, - msi_address, message_data); + &__msi_address, &__message_data); phb_unlock(phb); + *msi_address = cpu_to_be64(__msi_address); + *message_data = cpu_to_be32(__message_data); + return rc; } opal_call(OPAL_GET_MSI_64, opal_get_msi_64, 6); @@ -820,10 +859,13 @@ static int64_t opal_pci_get_phb_diag_data2(uint64_t phb_id, } opal_call(OPAL_PCI_GET_PHB_DIAG_DATA2, opal_pci_get_phb_diag_data2, 3); -static int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe, - uint16_t *pci_error_type, uint16_t *severity) +static int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe, + __be16 *pci_error_type, __be16 *severity) { struct phb *phb = pci_get_phb(phb_id); + uint64_t __first_frozen_pe; + uint16_t __pci_error_type; + uint16_t __severity; int64_t rc; if (!opal_addr_valid(first_frozen_pe) || @@ -837,10 +879,14 @@ static int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe, phb_lock(phb); opal_pci_eeh_clear_evt(phb_id); - rc = phb->ops->next_error(phb, first_frozen_pe, pci_error_type, - severity); + rc = phb->ops->next_error(phb, &__first_frozen_pe, &__pci_error_type, + &__severity); phb_unlock(phb); + *first_frozen_pe = cpu_to_be64(__first_frozen_pe); + *pci_error_type = cpu_to_be16(__pci_error_type); + *severity = cpu_to_be16(__severity); + return rc; } opal_call(OPAL_PCI_NEXT_ERROR, opal_pci_next_error, 4); @@ -901,9 +947,10 @@ static int64_t opal_pci_set_p2p(uint64_t phbid_init, uint64_t phbid_target, } opal_call(OPAL_PCI_SET_P2P, opal_pci_set_p2p, 4); -static int64_t opal_pci_get_pbcq_tunnel_bar(uint64_t phb_id, uint64_t *addr) +static int64_t opal_pci_get_pbcq_tunnel_bar(uint64_t phb_id, __be64 *addr) { struct phb *phb = pci_get_phb(phb_id); + uint64_t __addr; if (!opal_addr_valid(addr)) return OPAL_PARAMETER; @@ -914,8 +961,11 @@ static int64_t opal_pci_get_pbcq_tunnel_bar(uint64_t phb_id, uint64_t *addr) return OPAL_UNSUPPORTED; phb_lock(phb); - phb->ops->get_tunnel_bar(phb, addr); + phb->ops->get_tunnel_bar(phb, &__addr); phb_unlock(phb); + + *addr = cpu_to_be64(__addr); + return OPAL_SUCCESS; } opal_call(OPAL_PCI_GET_PBCQ_TUNNEL_BAR, opal_pci_get_pbcq_tunnel_bar, 2); diff --git a/core/powercap.c b/core/powercap.c index b9d172b54..cb24e92dc 100644 --- a/core/powercap.c +++ b/core/powercap.c @@ -7,13 +7,19 @@ #include -static int opal_get_powercap(u32 handle, int token __unused, u32 *pcap) +static int opal_get_powercap(u32 handle, int token __unused, __be32 *pcap) { if (!pcap || !opal_addr_valid(pcap)) return OPAL_PARAMETER; - if (powercap_get_class(handle) == POWERCAP_CLASS_OCC) - return occ_get_powercap(handle, pcap); + if (powercap_get_class(handle) == POWERCAP_CLASS_OCC) { + u32 __pcap; + int rc; + + rc = occ_get_powercap(handle, &__pcap); + *pcap = cpu_to_be32(__pcap); + return rc; + } return OPAL_UNSUPPORTED; }; diff --git a/core/psr.c b/core/psr.c index 4cd3768ae..641c41260 100644 --- a/core/psr.c +++ b/core/psr.c @@ -10,13 +10,19 @@ #include static int opal_get_power_shift_ratio(u32 handle, int token __unused, - u32 *ratio) + __be32 *ratio) { if (!ratio || !opal_addr_valid(ratio)) return OPAL_PARAMETER; - if (psr_get_class(handle) == PSR_CLASS_OCC) - return occ_get_psr(handle, ratio); + if (psr_get_class(handle) == PSR_CLASS_OCC) { + u32 __ratio; + int rc; + + rc = occ_get_psr(handle, &__ratio); + *ratio = cpu_to_be32(__ratio); + return rc; + } return OPAL_UNSUPPORTED; }; diff --git a/hw/fsp/fsp-console.c b/hw/fsp/fsp-console.c index 42fb98806..bc3284fc1 100644 --- a/hw/fsp/fsp-console.c +++ b/hw/fsp/fsp-console.c @@ -579,7 +579,7 @@ void fsp_console_preinit(void) } -static int64_t fsp_console_write(int64_t term_number, int64_t *length, +static int64_t fsp_console_write(int64_t term_number, __be64 *length, const uint8_t *buffer) { struct fsp_serial *fs; @@ -596,7 +596,7 @@ static int64_t fsp_console_write(int64_t term_number, int64_t *length, return OPAL_CLOSED; } /* Clamp to a reasonable size */ - requested = *length; + requested = be64_to_cpu(*length); if (requested > 0x1000) requested = 0x1000; written = fsp_write_vserial(fs, buffer, requested); @@ -618,7 +618,7 @@ static int64_t fsp_console_write(int64_t term_number, int64_t *length, buffer[6], buffer[6], buffer[7], buffer[7]); #endif /* OPAL_DEBUG_CONSOLE_IO */ - *length = written; + *length = cpu_to_be64(written); unlock(&fsp_con_lock); if (written) @@ -628,11 +628,12 @@ static int64_t fsp_console_write(int64_t term_number, int64_t *length, } static int64_t fsp_console_write_buffer_space(int64_t term_number, - int64_t *length) + __be64 *length) { static bool elog_generated = false; struct fsp_serial *fs; struct fsp_serbuf_hdr *sb; + int64_t l; if (term_number < 0 || term_number >= MAX_SERIAL) return OPAL_PARAMETER; @@ -645,15 +646,16 @@ static int64_t fsp_console_write_buffer_space(int64_t term_number, return OPAL_CLOSED; } sb = fs->out_buf; - *length = (sb->next_out + SER_BUF_DATA_SIZE - sb->next_in - 1) + l = (sb->next_out + SER_BUF_DATA_SIZE - sb->next_in - 1) % SER_BUF_DATA_SIZE; unlock(&fsp_con_lock); /* Console buffer has enough space to write incoming data */ - if (*length != fs->out_buf_prev_len) { - fs->out_buf_prev_len = *length; + if (l != fs->out_buf_prev_len) { + fs->out_buf_prev_len = l; fs->out_buf_timeout = 0; + *length = cpu_to_be64(l); return OPAL_SUCCESS; } @@ -667,8 +669,10 @@ static int64_t fsp_console_write_buffer_space(int64_t term_number, secs_to_tb(SER_BUFFER_OUT_TIMEOUT); } - if (tb_compare(mftb(), fs->out_buf_timeout) != TB_AAFTERB) + if (tb_compare(mftb(), fs->out_buf_timeout) != TB_AAFTERB) { + *length = cpu_to_be64(l); return OPAL_SUCCESS; + } /* * FSP is still active but not reading console data. Hence @@ -686,13 +690,13 @@ static int64_t fsp_console_write_buffer_space(int64_t term_number, return OPAL_RESOURCE; } -static int64_t fsp_console_read(int64_t term_number, int64_t *length, +static int64_t fsp_console_read(int64_t term_number, __be64 *length, uint8_t *buffer) { struct fsp_serial *fs; struct fsp_serbuf_hdr *sb; bool pending = false; - uint32_t old_nin, n, i, chunk, req = *length; + uint32_t old_nin, n, i, chunk, req = be64_to_cpu(*length); int rc = OPAL_SUCCESS; if (term_number < 0 || term_number >= MAX_SERIAL) @@ -716,7 +720,7 @@ static int64_t fsp_console_read(int64_t term_number, int64_t *length, pending = true; n = req; } - *length = n; + *length = cpu_to_be64(n); chunk = SER_BUF_DATA_SIZE - sb->next_out; if (chunk > n) diff --git a/hw/lpc-uart.c b/hw/lpc-uart.c index feca229b6..51baf4008 100644 --- a/hw/lpc-uart.c +++ b/hw/lpc-uart.c @@ -255,10 +255,10 @@ static uint32_t uart_tx_buf_space(void) (out_buf_prod + OUT_BUF_SIZE - out_buf_cons) % OUT_BUF_SIZE; } -static int64_t uart_opal_write(int64_t term_number, int64_t *length, +static int64_t uart_opal_write(int64_t term_number, __be64 *length, const uint8_t *buffer) { - size_t written = 0, len = *length; + size_t written = 0, len = be64_to_cpu(*length); if (term_number != 0) return OPAL_PARAMETER; @@ -277,19 +277,19 @@ static int64_t uart_opal_write(int64_t term_number, int64_t *length, unlock(&uart_lock); - *length = written; + *length = cpu_to_be64(written); return OPAL_SUCCESS; } static int64_t uart_opal_write_buffer_space(int64_t term_number, - int64_t *length) + __be64 *length) { if (term_number != 0) return OPAL_PARAMETER; lock(&uart_lock); - *length = uart_tx_buf_space(); + *length = cpu_to_be64(uart_tx_buf_space()); unlock(&uart_lock); return OPAL_SUCCESS; @@ -326,10 +326,10 @@ static void uart_adjust_opal_event(void) } /* This is called with the console lock held */ -static int64_t uart_opal_read(int64_t term_number, int64_t *length, +static int64_t uart_opal_read(int64_t term_number, __be64 *length, uint8_t *buffer) { - size_t req_count = *length, read_cnt = 0; + size_t req_count = be64_to_cpu(*length), read_cnt = 0; uint8_t lsr = 0; if (term_number != 0) @@ -373,7 +373,7 @@ static int64_t uart_opal_read(int64_t term_number, int64_t *length, /* Adjust the OPAL event */ uart_adjust_opal_event(); - *length = read_cnt; + *length = cpu_to_be64(read_cnt); return OPAL_SUCCESS; } diff --git a/hw/npu2-opencapi.c b/hw/npu2-opencapi.c index 9a391bb01..73ec6f099 100644 --- a/hw/npu2-opencapi.c +++ b/hw/npu2-opencapi.c @@ -2167,10 +2167,12 @@ out: } static int64_t opal_npu_mem_alloc(uint64_t phb_id, uint32_t __unused bdfn, - uint64_t size, uint64_t *bar) + uint64_t size, __be64 *bar) { struct phb *phb = pci_get_phb(phb_id); struct npu2_dev *dev; + uint64_t __bar; + int64_t rc; if (!phb || phb->phb_type != phb_type_npu_v2_opencapi) @@ -2183,7 +2185,11 @@ static int64_t opal_npu_mem_alloc(uint64_t phb_id, uint32_t __unused bdfn, if (!opal_addr_valid(bar)) return OPAL_PARAMETER; - return alloc_mem_bar(dev, size, bar); + rc = alloc_mem_bar(dev, size, &__bar); + if (rc == OPAL_SUCCESS) + *bar = cpu_to_be64(__bar); + + return rc; } opal_call(OPAL_NPU_MEM_ALLOC, opal_npu_mem_alloc, 4); diff --git a/hw/xscom.c b/hw/xscom.c index 9b28422d2..3f445fc91 100644 --- a/hw/xscom.c +++ b/hw/xscom.c @@ -639,7 +639,17 @@ int _xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val, bool take_loc return rc; } -opal_call(OPAL_XSCOM_READ, xscom_read, 3); +static int64_t opal_xscom_read(uint32_t partid, uint64_t pcb_addr, __be64 *val) +{ + uint64_t __val; + int64_t rc; + + rc = xscom_read(partid, pcb_addr, &__val); + *val = cpu_to_be64(__val); + + return rc; +} +opal_call(OPAL_XSCOM_READ, opal_xscom_read, 3); int _xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val, bool take_lock) { @@ -683,7 +693,12 @@ int _xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val, bool take_loc unlock(&xscom_lock); return rc; } -opal_call(OPAL_XSCOM_WRITE, xscom_write, 3); + +static int64_t opal_xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val) +{ + return xscom_write(partid, pcb_addr, val); +} +opal_call(OPAL_XSCOM_WRITE, opal_xscom_write, 3); /* * Perform a xscom read-modify-write. diff --git a/include/console.h b/include/console.h index 26602b7ac..a5f7988cc 100644 --- a/include/console.h +++ b/include/console.h @@ -47,13 +47,13 @@ struct opal_con_ops { */ void (*init)(void); - int64_t (*write)(int64_t term, int64_t *len, const uint8_t *buf); - int64_t (*read)(int64_t term, int64_t *len, uint8_t *buf); + int64_t (*write)(int64_t term, __be64 *len, const uint8_t *buf); + int64_t (*read)(int64_t term, __be64 *len, uint8_t *buf); /* * returns the amount of space available in the console write buffer */ - int64_t (*space)(int64_t term_number, int64_t *length); + int64_t (*space)(int64_t term_number, __be64 *length); /* * Forces the write buffer to be flushed by the driver