| Message ID | 20190820103138.30013-1-oohall@gmail.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | pci: recheck pci nvram hacks on fast-reboot | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch master (a1fced25bf41f1f94a3673a0b2bf68135eedce25) |
| snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot | success | Test snowpatch/job/snowpatch-skiboot on branch master |
| snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco | success | Signed-off-by present |
On 20/08/2019 20:31, Oliver O'Halloran wrote: > Sometimes it's useful to fiddle with some of the PCI NVRAM options that > we have. Currently this is mostly for enabling and disabling pci-tracing > mode, but having a common place for this stuff is a good idea. > > Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> > --- > core/fast-reboot.c | 3 +++ > core/init.c | 5 ++++- > hw/phb4.c | 2 -- > include/pci.h | 5 ++++- > 4 files changed, 11 insertions(+), 4 deletions(-) > > diff --git a/core/fast-reboot.c b/core/fast-reboot.c > index ed5f54671692..9631eb96d072 100644 > --- a/core/fast-reboot.c > +++ b/core/fast-reboot.c > @@ -433,6 +433,9 @@ void __noreturn fast_reboot_entry(void) > psi_irq_reset(); > } > > + /* update pci nvram settings */ > + pci_nvram_init(); > + > /* Remove all PCI devices */ > if (pci_reset()) { > prlog(PR_NOTICE, "RESET: Fast reboot failed to reset PCI\n"); > diff --git a/core/init.c b/core/init.c > index 60871d36a7f6..8d455230fc18 100644 > --- a/core/init.c > +++ b/core/init.c > @@ -48,6 +48,7 @@ > > enum proc_gen proc_gen; > unsigned int pcie_max_link_speed; > +bool pci_tracing; > bool verbose_eeh; > extern const char version[]; > > @@ -844,7 +845,7 @@ static void per_thread_sanity_checks(void) > assert(cpu->state != cpu_state_no_cpu); > } > > -static void pci_nvram_init(void) > +void pci_nvram_init(void) > { > const char *nvram_speed; > > @@ -860,6 +861,8 @@ static void pci_nvram_init(void) > prlog(PR_NOTICE, "PHB: NVRAM set max link speed to GEN%i\n", > pcie_max_link_speed); > } > + > + pci_tracing = nvram_query_eq_safe("pci-tracing", "true"); > } > > static uint32_t mem_csum(void *_p, void *_e) > diff --git a/hw/phb4.c b/hw/phb4.c > index c932cf980fd7..3c71427aef2f 100644 > --- a/hw/phb4.c > +++ b/hw/phb4.c > @@ -138,7 +138,6 @@ static void phb4_init_hw(struct phb4 *p); > > #define PHB4_CAN_STORE_EOI(p) XIVE_STORE_EOI_ENABLED > > -static bool pci_tracing; > static bool pci_eeh_mmio; > static bool pci_retry_all; > static int rx_err_max = PHB4_RX_ERR_MAX; > @@ -5946,7 +5945,6 @@ void probe_phb4(void) > struct dt_node *np; > const char *s; > > - pci_tracing = nvram_query_eq_safe("pci-tracing", "true"); > pci_eeh_mmio = !nvram_query_eq_dangerous("pci-eeh-mmio", "disabled"); > pci_retry_all = nvram_query_eq_dangerous("pci-retry-all", "true"); > s = nvram_query_dangerous("phb-rx-err-max"); > diff --git a/include/pci.h b/include/pci.h > index 220d6b187f5f..dcd354a7cfef 100644 > --- a/include/pci.h > +++ b/include/pci.h > @@ -356,8 +356,11 @@ enum phb_type { > phb_type_npu_v3, > }; > > - > +/* Generic PCI NVRAM flags */ > extern bool verbose_eeh; > +extern bool pci_tracing; > + > +void pci_nvram_init(void); > > struct phb { > struct dt_node *dt_node; >
diff --git a/core/fast-reboot.c b/core/fast-reboot.c index ed5f54671692..9631eb96d072 100644 --- a/core/fast-reboot.c +++ b/core/fast-reboot.c @@ -433,6 +433,9 @@ void __noreturn fast_reboot_entry(void) psi_irq_reset(); } + /* update pci nvram settings */ + pci_nvram_init(); + /* Remove all PCI devices */ if (pci_reset()) { prlog(PR_NOTICE, "RESET: Fast reboot failed to reset PCI\n"); diff --git a/core/init.c b/core/init.c index 60871d36a7f6..8d455230fc18 100644 --- a/core/init.c +++ b/core/init.c @@ -48,6 +48,7 @@ enum proc_gen proc_gen; unsigned int pcie_max_link_speed; +bool pci_tracing; bool verbose_eeh; extern const char version[]; @@ -844,7 +845,7 @@ static void per_thread_sanity_checks(void) assert(cpu->state != cpu_state_no_cpu); } -static void pci_nvram_init(void) +void pci_nvram_init(void) { const char *nvram_speed; @@ -860,6 +861,8 @@ static void pci_nvram_init(void) prlog(PR_NOTICE, "PHB: NVRAM set max link speed to GEN%i\n", pcie_max_link_speed); } + + pci_tracing = nvram_query_eq_safe("pci-tracing", "true"); } static uint32_t mem_csum(void *_p, void *_e) diff --git a/hw/phb4.c b/hw/phb4.c index c932cf980fd7..3c71427aef2f 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -138,7 +138,6 @@ static void phb4_init_hw(struct phb4 *p); #define PHB4_CAN_STORE_EOI(p) XIVE_STORE_EOI_ENABLED -static bool pci_tracing; static bool pci_eeh_mmio; static bool pci_retry_all; static int rx_err_max = PHB4_RX_ERR_MAX; @@ -5946,7 +5945,6 @@ void probe_phb4(void) struct dt_node *np; const char *s; - pci_tracing = nvram_query_eq_safe("pci-tracing", "true"); pci_eeh_mmio = !nvram_query_eq_dangerous("pci-eeh-mmio", "disabled"); pci_retry_all = nvram_query_eq_dangerous("pci-retry-all", "true"); s = nvram_query_dangerous("phb-rx-err-max"); diff --git a/include/pci.h b/include/pci.h index 220d6b187f5f..dcd354a7cfef 100644 --- a/include/pci.h +++ b/include/pci.h @@ -356,8 +356,11 @@ enum phb_type { phb_type_npu_v3, }; - +/* Generic PCI NVRAM flags */ extern bool verbose_eeh; +extern bool pci_tracing; + +void pci_nvram_init(void); struct phb { struct dt_node *dt_node;
Sometimes it's useful to fiddle with some of the PCI NVRAM options that we have. Currently this is mostly for enabling and disabling pci-tracing mode, but having a common place for this stuff is a good idea. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> --- core/fast-reboot.c | 3 +++ core/init.c | 5 ++++- hw/phb4.c | 2 -- include/pci.h | 5 ++++- 4 files changed, 11 insertions(+), 4 deletions(-)