diff mbox series

[v9,23/25] MPIPL: Reserve memory to capture architected registers data

Message ID 20190712111802.23560-24-hegdevasant@linux.vnet.ibm.com
State Accepted
Headers show
Series MPIPL support | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch success Successfully applied on branch master (4db38a36b31045f0a116d388ddeac850b38c8680)
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot success Test snowpatch/job/snowpatch-skiboot on branch master
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco success Signed-off-by present

Commit Message

Vasant Hegde July 12, 2019, 11:18 a.m. UTC 
- Split SPIRAH memory to accommodate architected register ntuple.
  Today we have 1K memory for SPIRAH and it uses 288 bytes. Lets split
  this into two parts :
    SPIRAH (756 bytes)
    architected register memory (256 bytes)

- Update SPIRAH architected register ntuple

- Calculate memory required to capture architected registers data
  Ideally we should use HDAT provided data (proc_dump_area->thread_size).
  But we are not getting this data during boot. Hence lets reserve fixed
  memory for architected registers data collection.

- Add architected registers destination memory to reserve-memory DT node.

Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
---
 core/opal-dump.c  | 28 ++++++++++++++++++++++++++++
 hdata/spira.c     |  7 +++++++
 include/mem-map.h | 14 +++++++++++++-
 skiboot.lds.S     |  5 +++++
 4 files changed, 53 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/core/opal-dump.c b/core/opal-dump.c
index 6aefefdf7..fb8ff9fe8 100644
--- a/core/opal-dump.c
+++ b/core/opal-dump.c
@@ -16,6 +16,7 @@ 
 
 #define pr_fmt(fmt)	"DUMP: " fmt
 
+#include <chip.h>
 #include <cpu.h>
 #include <device.h>
 #include <mem-map.h>
@@ -31,9 +32,16 @@ 
 
 #include "hdata/spira.h"
 
+/* XXX Ideally we should use HDAT provided data (proc_dump_area->thread_size).
+ *     But we are not getting this data durig boot. Hence lets reserve fixed
+ *     memory for architected registers data collection.
+ */
+#define ARCH_REGS_DATA_SIZE_PER_CHIP	(512 * 1024)
+
 /* Actual address of MDST and MDDT table */
 #define MDST_TABLE_BASE		(SKIBOOT_BASE + MDST_TABLE_OFF)
 #define MDDT_TABLE_BASE		(SKIBOOT_BASE + MDDT_TABLE_OFF)
+#define PROC_DUMP_AREA_BASE	(SKIBOOT_BASE + PROC_DUMP_AREA_OFF)
 
 static struct spira_ntuple *ntuple_mdst;
 static struct spira_ntuple *ntuple_mddt;
@@ -214,6 +222,8 @@  static int opal_mpipl_remove_entry_mddt(bool remove_all, u8 region, u64 dest)
 static void opal_mpipl_register(void)
 {
 	u64 opal_dest, opal_size;
+	u64 arch_regs_dest, arch_regs_size;
+	struct proc_dump_area *proc_dump = (void *)(PROC_DUMP_AREA_BASE);
 
 	/* Get OPAL runtime size */
 	if (!dt_find_property(opal_node, "opal-runtime-size")) {
@@ -233,6 +243,24 @@  static void opal_mpipl_register(void)
 	/* Add OPAL reservation detail to MDST/MDDT table */
 	opal_mpipl_add_entry(DUMP_REGION_OPAL_MEMORY,
 			     SKIBOOT_BASE, opal_dest, opal_size);
+
+	/* Thread size check */
+	if (proc_dump->thread_size != 0) {
+		prlog(PR_INFO, "Thread register entry size is available, "
+		      "but not supported.\n");
+	}
+
+	/* Calculate memory to capture CPU register data */
+	arch_regs_dest = opal_dest + opal_size;
+	arch_regs_size = nr_chips() * ARCH_REGS_DATA_SIZE_PER_CHIP;
+
+	/* Reserve memory used to capture architected register state */
+	mem_reserve_fw("ibm,firmware-arch-registers",
+		       arch_regs_dest, arch_regs_size);
+	proc_dump->alloc_addr = arch_regs_dest | HRMOR_BIT;
+	proc_dump->alloc_size = arch_regs_size;
+	prlog(PR_NOTICE, "Architected register dest addr : 0x%llx, "
+	      "size : 0x%llx\n", arch_regs_dest, arch_regs_size);
 }
 
 static int payload_mpipl_register(u64 src, u64 dest, u64 size)
diff --git a/hdata/spira.c b/hdata/spira.c
index 9d487b8b2..76886b065 100644
--- a/hdata/spira.c
+++ b/hdata/spira.c
@@ -213,6 +213,13 @@  __section(".spirah.data") struct spirah spirah = {
 			.alloc_len      = CPU_TO_BE32(sizeof(struct mdrt_table)),
 			.act_len        = CPU_TO_BE32(sizeof(struct mdrt_table)),
 		},
+		.proc_dump_area = {
+			.addr		= CPU_TO_BE64(PROC_DUMP_AREA_OFF),
+			.alloc_cnt	= CPU_TO_BE16(1),
+			.act_cnt	= CPU_TO_BE16(1),
+			.alloc_len	= CPU_TO_BE32(sizeof(struct proc_dump_area)),
+			.act_len	= CPU_TO_BE32(sizeof(struct proc_dump_area)),
+		},
 	},
 };
 
diff --git a/include/mem-map.h b/include/mem-map.h
index a29b8fb3e..859fef75c 100644
--- a/include/mem-map.h
+++ b/include/mem-map.h
@@ -38,10 +38,22 @@ 
  * give it 64k before placing the SPIRA and related data.
  */
 #define SPIRA_OFF		0x00010000
+#define SPIRA_SIZE		0x400
 #define SPIRAH_OFF		0x00010400
+#define SPIRAH_SIZE		0x300
+
+#define PROC_DUMP_AREA_OFF	(SPIRAH_OFF + SPIRAH_SIZE)
+#define PROC_DUMP_AREA_SIZE	0x100
 
 /* Actual SPIRA size is lesser than 1K (presently 0x340 bytes).
- * Use 1K for legacy SPIRA and 1K for SPIRA-H.
+ * Use 1K for legacy SPIRA.
+ *
+ * SPIRA-H is lesser than 768 bytes (presently we use 288 bytes)
+ * Use 768 bytes for SPIRAH.
+ *
+ * Use 256 bytes for processor dump area. (presently we use
+ * sizeof(proc_dump_area) = 0x30 bytes).
+ *
  * Then follow with for proc_init_data (aka PROCIN).
  * These need to be at fixed addresses in case we're ever little
  * endian: linker can't endian reverse a pointer for us.  Text, data
diff --git a/skiboot.lds.S b/skiboot.lds.S
index 5fb32c866..81fa6eaa1 100644
--- a/skiboot.lds.S
+++ b/skiboot.lds.S
@@ -80,6 +80,11 @@  SECTIONS
 		KEEP(*(.spirah.data))
 	}
 
+	. = PROC_DUMP_AREA_OFF;
+	.procdump : {
+		KEEP(*(.procdump.data))
+	}
+
 	. = PROCIN_OFF;
 	.procin.data : {
 		KEEP(*(.procin.data))