@@ -58,6 +58,7 @@
enum proc_gen proc_gen;
unsigned int pcie_max_link_speed;
+bool verbose_eeh;
static uint64_t kernel_entry;
static size_t kernel_size;
@@ -866,6 +867,10 @@ static void pci_nvram_init(void)
{
const char *nvram_speed;
+ verbose_eeh = nvram_query_eq_safe("pci-eeh-verbose", "true");
+ if (verbose_eeh)
+ prlog(PR_INFO, "PHB: Verbose EEH enabled\n");
+
pcie_max_link_speed = 0;
nvram_speed = nvram_query_dangerous("pcie-max-link-speed");
@@ -151,7 +151,6 @@ static void phb4_init_hw(struct phb4 *p);
#define PHB4_CAN_STORE_EOI(p) XIVE_STORE_EOI_ENABLED
-static bool verbose_eeh;
static bool pci_tracing;
static bool pci_eeh_mmio;
static bool pci_retry_all;
@@ -5934,6 +5933,9 @@ static void phb4_probe_pbcq(struct dt_node *pbcq)
uint32_t nest_base, pci_base, pec_index;
struct dt_node *stk;
+ /* REMOVEME: force this for now until we stabalise PCIe */
+ verbose_eeh = 1;
+
nest_base = dt_get_address(pbcq, 0, NULL);
pci_base = dt_get_address(pbcq, 1, NULL);
pec_index = dt_prop_get_u32(pbcq, "ibm,pec-index");
@@ -5949,12 +5951,6 @@ void probe_phb4(void)
struct dt_node *np;
const char *s;
- verbose_eeh = nvram_query_eq_safe("pci-eeh-verbose", "true");
- /* REMOVEME: force this for now until we stabalise PCIe */
- verbose_eeh = 1;
- if (verbose_eeh)
- prlog(PR_INFO, "PHB4: Verbose EEH enabled\n");
-
pci_tracing = nvram_query_eq_safe("pci-tracing", "true");
pci_eeh_mmio = !nvram_query_eq_dangerous("pci-eeh-mmio", "disabled");
pci_retry_all = nvram_query_eq_dangerous("pci-retry-all", "true");
@@ -368,6 +368,9 @@ enum phb_type {
phb_type_npu_v2_opencapi,
};
+
+extern bool verbose_eeh;
+
struct phb {
struct dt_node *dt_node;
int opal_id;
We currently have the "pci-eeh-verbose" NVRAM flag that causes phb4 to print a register dump when it detects the PHB has been fenced. This is useful for debugging most EEH issues since the kernel may not be ready to handle EEH events when the problem is first detected. There's no real reason this needs to be specific to PHB4 so this patch moves the nvram flag handling into the generic init path (along with the pcie_max_link_speed flag) so we can add a similar function for PHB3. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> --- core/init.c | 5 +++++ hw/phb4.c | 10 +++------- include/pci.h | 3 +++ 3 files changed, 11 insertions(+), 7 deletions(-)