| Message ID | 20180829051858.28813-1-mikey@neuling.org |
|---|---|
| State | Accepted |
| Headers | show |
| Series | phb4: Fix typo in disable lane eq code | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | master/apply_patch Successfully applied |
| snowpatch_ozlabs/make_check | success | Test make_check on branch master |
Michael Neuling <mikey@neuling.org> writes: > In this commit > commit 737c0ba3d72b8aab05a765a9fc111a48faac0f75 > Author: Michael Neuling <mikey@neuling.org> > Date: Thu Feb 22 10:52:18 2018 +1100 > phb4: Disable lane eq when retrying some nvidia GEN3 devices > > We made a typo and set PH2 twice. This fixes it. > > It worked previously as if only phase 2 (PH2) is set it, skips phase 2 > and phase 3 (PH3). > > Reported-by: Meng Li <shlimeng@cn.ibm.com> > Signed-off-by: Michael Neuling <mikey@neuling.org> Something that should also go to stable? Merged to master as of 051da83b625daf81f250491d0c521e82e366dad6
On Tue, 2018-09-18 at 17:40 +1000, Stewart Smith wrote: > Michael Neuling <mikey@neuling.org> writes: > > In this commit > > commit 737c0ba3d72b8aab05a765a9fc111a48faac0f75 > > Author: Michael Neuling <mikey@neuling.org> > > Date: Thu Feb 22 10:52:18 2018 +1100 > > phb4: Disable lane eq when retrying some nvidia GEN3 devices > > > > We made a typo and set PH2 twice. This fixes it. > > > > It worked previously as if only phase 2 (PH2) is set it, skips phase 2 > > and phase 3 (PH3). > > > > Reported-by: Meng Li <shlimeng@cn.ibm.com> > > Signed-off-by: Michael Neuling <mikey@neuling.org> > > Something that should also go to stable? No, it's not really needed as it works as is. It was just a cleanup as the code was just wrong. Mikey > Merged to master as of 051da83b625daf81f250491d0c521e82e366dad6 >
diff --git a/hw/phb4.c b/hw/phb4.c index d1245dce5a..04b5f0bd96 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -4868,7 +4868,7 @@ static void phb4_init_hw(struct phb4 *p) /* Read modify write and set to 2 bits */ PHBDBG(p, "LINK: Disabling Lane EQ\n"); val = in_be64(p->regs + PHB_PCIE_DLP_CTL); - val |= PHB_PCIE_DLP_CTL_BYPASS_PH2 | PHB_PCIE_DLP_CTL_BYPASS_PH2; + val |= PHB_PCIE_DLP_CTL_BYPASS_PH2 | PHB_PCIE_DLP_CTL_BYPASS_PH3; out_be64(p->regs + PHB_PCIE_DLP_CTL, val); }
In this commit commit 737c0ba3d72b8aab05a765a9fc111a48faac0f75 Author: Michael Neuling <mikey@neuling.org> Date: Thu Feb 22 10:52:18 2018 +1100 phb4: Disable lane eq when retrying some nvidia GEN3 devices We made a typo and set PH2 twice. This fixes it. It worked previously as if only phase 2 (PH2) is set it, skips phase 2 and phase 3 (PH3). Reported-by: Meng Li <shlimeng@cn.ibm.com> Signed-off-by: Michael Neuling <mikey@neuling.org> --- hw/phb4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)