diff mbox series

hw/slw: Don't assert on a unknown chip

Message ID 20180427045936.26031-1-oohall@gmail.com
State Superseded
Headers show
Series hw/slw: Don't assert on a unknown chip | expand

Commit Message

Oliver O'Halloran April 27, 2018, 4:59 a.m. UTC
For some reason skiboot populates nodes in /cpus/ for the cores on
chips that are deconfigured. As a result Linux includes the threads
of those cores in it's set of possible CPUs in the system and attempts
to set the SPR values that should be used when waking a thread from
a deep sleep state.

However, in the case where we have deconfigured chip we don't create
a xscom node for that chip and as a result we don't have a proc_chip
structure for that chip either. In turn, this results in an assertion
failure when calling opal_slw_set_reg() since it expects the chip
structure to exist. Fix this up and print an error instead.

Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
---
 hw/slw.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/hw/slw.c b/hw/slw.c
index 905e54c9be36..2e43f2ad351f 100644
--- a/hw/slw.c
+++ b/hw/slw.c
@@ -1488,9 +1488,17 @@  int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val)
 	struct proc_chip *chip;
 	int rc;
 
-	assert(c);
+	if (!c) {
+		prerror("SLW: Unknown thread with pir %x\n", (u32) cpu_pir);
+		return OPAL_PARAMETER;
+	}
+
 	chip = get_chip(c->chip_id);
-	assert(chip);
+	if (!c) {
+		prerror("SLW: Unknown chip for thread with pir %x\n",
+			(u32) cpu_pir);
+		return OPAL_PARAMETER;
+	}
 
 	if (proc_gen == proc_gen_p9) {
 		if (!has_deep_states) {