From patchwork Wed Nov 29 00:38:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Neuling X-Patchwork-Id: 842371 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ymhVL4mmsz9s84 for ; Wed, 29 Nov 2017 11:38:50 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3ymhVL0D8rzDrbX for ; Wed, 29 Nov 2017 11:38:50 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [103.22.144.67]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3ymhVF0Km4zDrbN for ; Wed, 29 Nov 2017 11:38:45 +1100 (AEDT) Received: from localhost.localdomain (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 3ymhVD52nMz9s7B; Wed, 29 Nov 2017 11:38:44 +1100 (AEDT) Received: by localhost.localdomain (Postfix, from userid 1000) id 9CD0BEE7701; Wed, 29 Nov 2017 11:38:44 +1100 (AEDT) From: Michael Neuling To: stewart@linux.vnet.ibm.com Date: Wed, 29 Nov 2017 11:38:20 +1100 Message-Id: <20171129003821.14063-1-mikey@neuling.org> X-Mailer: git-send-email 2.14.1 Subject: [Skiboot] [PATCH 1/2] phb4: Init changes X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Neuling , skiboot@lists.ozlabs.org MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" These init changes for phb4 from the HW team. Link down are now endpoint recoverable (ERC) rather than PHB fatal errors. BLIF Completion Timeout Error now generate an interrupt rather than causing freeze events. Signed-off-by: Michael Neuling --- hw/phb4.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index cfadf59d0c..17c9e6db81 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -2144,9 +2144,9 @@ static void phb4_prepare_link_change(struct pci_slot *slot, bool is_up) out_be64(p->regs + PHB_REGB_ERR_INF_ENABLE, 0x2130006efca8bc00ull); out_be64(p->regs + PHB_REGB_ERR_ERC_ENABLE, - 0x0000000000000000ull); + 0x0080000000000000ull); out_be64(p->regs + PHB_REGB_ERR_FAT_ENABLE, - 0xde8fff91035743ffull); + 0xde0fff91035743ffull); /* * We might lose the bus numbers during the reset operation @@ -4245,12 +4245,12 @@ static void phb4_init_errors(struct phb4 *p) /* Enable/disable error status indicators that trigger irqs */ if (p->has_link) { out_be64(p->regs + 0x1c20, 0x2130006efca8bc00ull); - out_be64(p->regs + 0x1c30, 0xde8fff91035743ffull); + out_be64(p->regs + 0x1c30, 0xde1fff91035743ffull); } else { out_be64(p->regs + 0x1c20, 0x0000000000000000ull); out_be64(p->regs + 0x1c30, 0x0000000000000000ull); } - out_be64(p->regs + 0x1c28, 0x0000000000000000ull); + out_be64(p->regs + 0x1c28, 0x0080000000000000ull); out_be64(p->regs + 0x1c40, 0x0000000000000000ull); out_be64(p->regs + 0x1c48, 0x0000000000000000ull); out_be64(p->regs + 0x1c50, 0x0000000000000000ull); @@ -4274,7 +4274,7 @@ static void phb4_init_errors(struct phb4 *p) if (p->rev == PHB4_REV_NIMBUS_DD10) out_be64(p->regs + 0x0da8, 0xc00000b801000060ull); else - out_be64(p->regs + 0x0da8, 0xc00008b801000060ull); + out_be64(p->regs + 0x0da8, 0xc00018b801000060ull); /* * Errata ER20161123 says we should set the top two bits in * 0x0db0 but this causes config space accesses which don't @@ -4494,7 +4494,7 @@ static void phb4_init_hw(struct phb4 *p, bool first_init) /* Init_126..130 - Re-enable error interrupts */ out_be64(p->regs + PHB_ERR_IRQ_ENABLE, 0xca8880cc00000000ull); out_be64(p->regs + PHB_TXE_ERR_IRQ_ENABLE, 0x2008400e08200000ull); - out_be64(p->regs + PHB_RXE_ARB_ERR_IRQ_ENABLE, 0xc40028fc01804070ull); + out_be64(p->regs + PHB_RXE_ARB_ERR_IRQ_ENABLE, 0xc40038fc01804070ull); out_be64(p->regs + PHB_RXE_MRG_ERR_IRQ_ENABLE, 0x00006100008000a8ull); if (p->rev == PHB4_REV_NIMBUS_DD10) out_be64(p->regs + PHB_RXE_TCE_ERR_IRQ_ENABLE, 0x6051005000000000ull);