| Message ID | 20171116015023.2349-1-mikey@neuling.org |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [1/2] hdata: Fix copying GEN4 lane equalisation settings | expand |
Michael Neuling <mikey@neuling.org> writes: > These aren't copied currently but should be. > > Signed-off-by: Michael Neuling <mikey@neuling.org> Thanks, series merged to master as of d957e9278994831831f0bfa7d13433da4b36b4de and to 5.9.x as of 40e51134e8d227fdfb6590df6eacba0da5ecccca
diff --git a/hdata/iohub.c b/hdata/iohub.c index 134fa04660..a5f12fd121 100644 --- a/hdata/iohub.c +++ b/hdata/iohub.c @@ -280,6 +280,8 @@ static struct dt_node *add_pec_stack(const struct cechub_io_hub *hub, for (i = 0; i < 4; i++) /* gen 3 eq settings */ eq[i] = be64_to_cpu(hub->phb_lane_eq[phb_index][i]); + for (i = 0; i < 4; i++) /* gen 4 eq settings */ + eq[i+4] = be64_to_cpu(hub->phb4_lane_eq[phb_index][i]); /* Lane-eq settings are packed 2 bytes per lane for 16 lanes * On P9 DD1, 2 bytes per lane are used in the hardware
These aren't copied currently but should be. Signed-off-by: Michael Neuling <mikey@neuling.org> --- hdata/iohub.c | 2 ++ 1 file changed, 2 insertions(+)