| Message ID | 20171023091635.9561-1-mikey@neuling.org |
|---|---|
| State | Accepted |
| Headers | show |
| Series | phb4: Fix GEN3 for DD2.00 | expand |
Michael Neuling <mikey@neuling.org> writes: > In this fix: > 62ac7631ae phb4: Fix PCIe GEN4 on DD2.1 and above > We fixed DD2.1 GEN4 but broken DD2.00 as GEN3. > > This fixes dd2.00 back to GEN3. This time for sure! > > Signed-off-by: Michael Neuling <mikey@neuling.org> > Test-by: Pridhiviraj Paidipeddi <ppaidipe@in.ibm.com> > --- > hw/phb4.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) (for completeness), Mikey merged this as of 379d745cbf8b5af3d1cdfcfb172b169e157d09a5
diff --git a/hw/phb4.c b/hw/phb4.c index f83883b6d6..15d9c039bc 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -4928,7 +4928,7 @@ static void phb4_create(struct dt_node *np) if (p->rev == PHB4_REV_NIMBUS_DD10) p->max_link_speed = 2; if (p->rev == PHB4_REV_NIMBUS_DD20 && - chip->ec_level == 0 && chip->ec_rev == 0) + ((0xf & chip->ec_level) == 0) && chip->ec_rev == 0) p->max_link_speed = 3; if (dt_has_node_property(np, "ibm,max-link-speed", NULL)) p->max_link_speed = dt_prop_get_u32(np, "ibm,max-link-speed");
In this fix: 62ac7631ae phb4: Fix PCIe GEN4 on DD2.1 and above We fixed DD2.1 GEN4 but broken DD2.00 as GEN3. This fixes dd2.00 back to GEN3. This time for sure! Signed-off-by: Michael Neuling <mikey@neuling.org> Test-by: Pridhiviraj Paidipeddi <ppaidipe@in.ibm.com> --- hw/phb4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)