From patchwork Wed Mar 11 10:32:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 448911 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A3B4714016B for ; Wed, 11 Mar 2015 21:33:22 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 87AF01A08B9 for ; Wed, 11 Mar 2015 21:33:22 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from e23smtp09.au.ibm.com (e23smtp09.au.ibm.com [202.81.31.142]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 144EB1A0745 for ; Wed, 11 Mar 2015 21:33:20 +1100 (AEDT) Received: from /spool/local by e23smtp09.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 11 Mar 2015 20:33:19 +1000 Received: from d23dlp01.au.ibm.com (202.81.31.203) by e23smtp09.au.ibm.com (202.81.31.206) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Wed, 11 Mar 2015 20:33:16 +1000 Received: from d23relay08.au.ibm.com (d23relay08.au.ibm.com [9.185.71.33]) by d23dlp01.au.ibm.com (Postfix) with ESMTP id 59FD52CE8052 for ; Wed, 11 Mar 2015 21:33:16 +1100 (EST) Received: from d23av03.au.ibm.com (d23av03.au.ibm.com [9.190.234.97]) by d23relay08.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t2BAX8jW27918492 for ; Wed, 11 Mar 2015 21:33:16 +1100 Received: from d23av03.au.ibm.com (localhost [127.0.0.1]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t2BAWhYs004741 for ; Wed, 11 Mar 2015 21:32:43 +1100 Received: from mars.in.ibm.com (mars.in.ibm.com [9.124.35.88]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t2BAWgJO004085 for ; Wed, 11 Mar 2015 21:32:42 +1100 From: Mahesh J Salgaonkar To: skiboot list Date: Wed, 11 Mar 2015 16:02:18 +0530 Message-ID: <20150311103216.10209.58236.stgit@mars.in.ibm.com> In-Reply-To: <20150311102733.10209.5940.stgit@mars.in.ibm.com> References: <20150311102733.10209.5940.stgit@mars.in.ibm.com> User-Agent: StGit/0.17-dirty MIME-Version: 1.0 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15031110-0033-0000-0000-00000126B664 Subject: [Skiboot] [PATCH v2 7/9] opal: Recover from TFMR DEC parity error. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Mahesh Salgaonkar Recovery process for TFMR DEC parity error: - Set DEC Register with all ones. - Reset TFMR DEC parity error bit. To inject TFMR DEC parity error issue: $ putscom pu.ex 10013281 0006080000000000 -all Signed-off-by: Mahesh Salgaonkar --- hw/chiptod.c | 11 ++++++++++- include/processor.h | 1 + 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/hw/chiptod.c b/hw/chiptod.c index 6f6800f..1c77cb7 100644 --- a/hw/chiptod.c +++ b/hw/chiptod.c @@ -697,6 +697,14 @@ static bool tfmr_recover_non_tb_errors(uint64_t tfmr) tfmr_reset_errors |= SPR_TFMR_HDEC_PARITY_ERROR; } + if (tfmr & SPR_TFMR_DEC_PARITY_ERR) { + /* Set DEC with all ones */ + mtspr(SPR_DEC, ~0); + + /* set bit 59 to clear TFMR DEC parity error. */ + tfmr_reset_errors |= SPR_TFMR_DEC_PARITY_ERR; + } + /* Write TFMR twice to clear the error */ mtspr(SPR_TFMR, base_tfmr | tfmr_reset_errors); mtspr(SPR_TFMR, base_tfmr | tfmr_reset_errors); @@ -848,7 +856,8 @@ int chiptod_recover_tb_errors(void) /* * Now that TB is running, check for TFMR non-TB errors. */ - if (tfmr & SPR_TFMR_HDEC_PARITY_ERROR) { + if ((tfmr & SPR_TFMR_HDEC_PARITY_ERROR) || + (tfmr & SPR_TFMR_DEC_PARITY_ERR)) { if (!tfmr_recover_non_tb_errors(tfmr)) { rc = 0; goto error_out; diff --git a/include/processor.h b/include/processor.h index 9140564..30527b1 100644 --- a/include/processor.h +++ b/include/processor.h @@ -47,6 +47,7 @@ /* SPR register definitions */ #define SPR_DSISR 0x012 /* RW: Data storage interrupt status reg */ #define SPR_DAR 0x013 /* RW: Data address reg */ +#define SPR_DEC 0x016 /* RW: Decrement Register */ #define SPR_SDR1 0x019 #define SPR_SRR0 0x01a /* RW: Exception save/restore reg 0 */ #define SPR_SRR1 0x01b /* RW: Exception save/restore reg 1 */