From patchwork Wed Dec 13 05:24:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 847748 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yxQ9M1FJxz9s9Y for ; Wed, 13 Dec 2017 16:24:23 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3yxQ9L6tpGzDrYx for ; Wed, 13 Dec 2017 16:24:22 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=mahesh@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3yxQ9G07DGzDrbr for ; Wed, 13 Dec 2017 16:24:17 +1100 (AEDT) Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vBD5NwPt019663 for ; Wed, 13 Dec 2017 00:24:15 -0500 Received: from e06smtp13.uk.ibm.com (e06smtp13.uk.ibm.com [195.75.94.109]) by mx0b-001b2d01.pphosted.com with ESMTP id 2etrs7umgh-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 13 Dec 2017 00:24:15 -0500 Received: from localhost by e06smtp13.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 13 Dec 2017 05:24:11 -0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vBD5OBaq1769910 for ; Wed, 13 Dec 2017 05:24:11 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 78FBF11C058 for ; Wed, 13 Dec 2017 05:18:31 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 21A7611C04A for ; Wed, 13 Dec 2017 05:18:31 +0000 (GMT) Received: from jupiter.in.ibm.com (unknown [9.193.101.193]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP for ; Wed, 13 Dec 2017 05:18:30 +0000 (GMT) From: Mahesh J Salgaonkar To: skiboot list Date: Wed, 13 Dec 2017 10:54:10 +0530 In-Reply-To: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> References: <151314254377.30276.11351593636443259496.stgit@jupiter.in.ibm.com> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 17121305-0012-0000-0000-0000059874F1 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17121305-0013-0000-0000-000019138BBF Message-Id: <151314264285.30276.12274129437954654800.stgit@jupiter.in.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712130077 Subject: [Skiboot] [PATCH v2 2/6] opal: Get chip location code X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Mahesh Salgaonkar and store it under proc_chip for quick reference during HMI handling code. Signed-off-by: Mahesh Salgaonkar --- core/chip.c | 10 ++++++++++ include/chip.h | 15 +++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/core/chip.c b/core/chip.c index d2ff3f4..6526325 100644 --- a/core/chip.c +++ b/core/chip.c @@ -76,6 +76,7 @@ static void init_chip(struct dt_node *dn) { struct proc_chip *chip; uint32_t id; + const char *lc = NULL; id = dt_get_chip_id(dn); assert(id < MAX_CHIPS); @@ -97,6 +98,15 @@ static void init_chip(struct dt_node *dn) list_head_init(&chip->i2cms); + /* Update the location code for this chip. */ + if (dt_has_node_property(dn, "ibm,loc-code", NULL)) + lc = dt_prop_get(dn, "ibm,loc-code"); + else if (dt_has_node_property(dn, "ibm,slot-location-code", NULL)) + lc = dt_prop_get(dn, "ibm,slot-location-code"); + + if (lc) + chip->loc_code = strdup(lc); + prlog(PR_INFO, "CHIP: Initialised chip %d from %s\n", id, dn->name); chips[id] = chip; } diff --git a/include/chip.h b/include/chip.h index 566edc5..43b5ea5 100644 --- a/include/chip.h +++ b/include/chip.h @@ -215,6 +215,9 @@ struct proc_chip { struct xive *xive; struct vas *vas; + + /* location code of this chip */ + const uint8_t *loc_code; }; extern uint32_t pir_to_chip_id(uint32_t pir); @@ -241,5 +244,17 @@ static inline int nr_chips(void) return nr_chips; } +/* helper to get location code of a chip */ +static inline const char *chip_loc_code(uint32_t chip_id) +{ + struct proc_chip *chip; + + chip = get_chip(chip_id); + if (!chip) + return NULL; + + return chip->loc_code; +} + #endif /* __CHIP_H */