diff mbox series

cpu: Add OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED

Message ID 1507803478-13591-1-git-send-email-mpe@ellerman.id.au
State Accepted
Headers show
Series cpu: Add OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED | expand

Commit Message

Michael Ellerman Oct. 12, 2017, 10:17 a.m. UTC
Add a new CPU reinit flag, "TM Suspend Disabled", which requests that
CPUs be configured so that TM (Transactional Memory) suspend mode is
disabled.

Currently this always fails, because skiboot has no way to query the
state. A future hostboot change will add a mechanism for skiboot to
determine the status and return an appropriate error code.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
---
 core/cpu.c                           | 10 ++++++++++
 doc/opal-api/opal-reinit-cpus-70.rst |  8 ++++++++
 include/opal-api.h                   |  2 ++
 3 files changed, 20 insertions(+)

Comments

Stewart Smith Oct. 17, 2017, 9:57 p.m. UTC | #1
Michael Ellerman <mpe@ellerman.id.au> writes:
> Add a new CPU reinit flag, "TM Suspend Disabled", which requests that
> CPUs be configured so that TM (Transactional Memory) suspend mode is
> disabled.
>
> Currently this always fails, because skiboot has no way to query the
> state. A future hostboot change will add a mechanism for skiboot to
> determine the status and return an appropriate error code.
>
> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
> ---
>  core/cpu.c                           | 10 ++++++++++
>  doc/opal-api/opal-reinit-cpus-70.rst |  8 ++++++++
>  include/opal-api.h                   |  2 ++
>  3 files changed, 20 insertions(+)

Thanks, merged to master as of 39ffacb9691a3a4e5fe543787dfe4e671b6979b8
and in 5.9-rc3.

If we end up using it or not, at least we have the bit defined and can
jump off that cliff later.
diff mbox series

Patch

diff --git a/core/cpu.c b/core/cpu.c
index 78565b5afec9..c459aba6d84a 100644
--- a/core/cpu.c
+++ b/core/cpu.c
@@ -1373,6 +1373,16 @@  static int64_t opal_reinit_cpus(uint64_t flags)
 		flags &= ~(OPAL_REINIT_CPUS_HILE_BE | OPAL_REINIT_CPUS_HILE_LE);
 	}
 
+	if (flags & OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) {
+		flags &= ~OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED;
+
+		/*
+		 * Pending a hostboot change we can't determine the status of
+		 * this, so it always fails.
+		 */
+		rc = OPAL_UNSUPPORTED;
+	}
+
 	/* Handle P8 DD1 SLW reinit */
 	if (flags != 0 && proc_gen == proc_gen_p8 && !hile_supported)
 		rc = slw_reinit(flags);
diff --git a/doc/opal-api/opal-reinit-cpus-70.rst b/doc/opal-api/opal-reinit-cpus-70.rst
index 0eb670447f80..bee350d55f88 100644
--- a/doc/opal-api/opal-reinit-cpus-70.rst
+++ b/doc/opal-api/opal-reinit-cpus-70.rst
@@ -17,6 +17,7 @@  Currently, possible flags are: ::
 	OPAL_REINIT_CPUS_HILE_LE	= (1 << 1),
 	OPAL_REINIT_CPUS_MMU_HASH	= (1 << 2),
 	OPAL_REINIT_CPUS_MMU_RADIX	= (1 << 3),
+	OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED = (1 << 4),
   };
 
 Extra flags may be added in the future, so other bits *must* be 0.
@@ -30,6 +31,13 @@  are support and other bits *MUST NOT* be set.
 On POWER9 CPUs, all options including OPAL_REINIT_CPUS_MMU_HASH and
 OPAL_REINIT_CPUS_MMU_RADIX.
 
+OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+This flag requests that CPUs be configured with TM (Transactional Memory)
+suspend mode disabled. This may only be supported on some CPU versions.
+
+
 Returns
 -------
 
diff --git a/include/opal-api.h b/include/opal-api.h
index 0ff0db0254f8..0bc036ed7a52 100644
--- a/include/opal-api.h
+++ b/include/opal-api.h
@@ -1033,6 +1033,8 @@  enum {
 	 */
 	OPAL_REINIT_CPUS_MMU_HASH	= (1 << 2),
 	OPAL_REINIT_CPUS_MMU_RADIX	= (1 << 3),
+
+	OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED = (1 << 4),
 };
 
 typedef struct oppanel_line {