| Message ID | 1468390838-2936-1-git-send-email-stewart@linux.vnet.ibm.com |
|---|---|
| State | Rejected |
| Headers | show |
On Wed, Jul 13, 2016 at 4:20 PM, Stewart Smith <stewart@linux.vnet.ibm.com> wrote: > Fixes building skiboot without optimization. > > Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> > --- > include/processor.h | 27 +++++++++++++++------------ > 1 file changed, 15 insertions(+), 12 deletions(-) > > diff --git a/include/processor.h b/include/processor.h > index 48bbf903df58..76ddf2ee4802 100644 > --- a/include/processor.h > +++ b/include/processor.h > @@ -18,6 +18,9 @@ > #define __PROCESSOR_H > > #include <bitutils.h> > +#ifndef __ASSEMBLY__ > +#include <ccan/str/str.h> > +#endif > > /* P7 MSR bits */ > #define MSR_SF PPC_BIT(0) /* 64-bit mode */ > @@ -235,18 +238,18 @@ static inline void mtmsrd(unsigned long val, int l) > asm volatile("mtmsrd %0,%1" : : "r"(val), "i"(l) : "memory"); > } > > -static inline unsigned long mfspr(unsigned int spr) > -{ > - unsigned long val; > - > - asm volatile("mfspr %0,%1" : "=r"(val) : "i"(spr) : "memory"); > - return val; > -} > - > -static inline void mtspr(unsigned int spr, unsigned long val) > -{ > - asm volatile("mtspr %0,%1" : : "i"(spr), "r"(val) : "memory"); > -} > +#define mfspr(spr) ( \ > +{ \ > + unsigned long val; \ > +\ > + asm volatile("mfspr %0," stringify(spr) : "=r"(val) : : "memory"); \ > + val; \ > +}) > + > +#define mtspr(spr, val) (\ > +{ \ > + asm volatile("mtspr " stringify(spr) ",%0" : : "r"(val) : "memory"); \ > +}) > > /* Helpers for special sequences needed by some registers */ > extern void set_hid0(unsigned long hid0); Are you suggesting that inline is ignored by gcc without -O2? Have you considered __attribute__((always_inline))? Balbir Singh
diff --git a/include/processor.h b/include/processor.h index 48bbf903df58..76ddf2ee4802 100644 --- a/include/processor.h +++ b/include/processor.h @@ -18,6 +18,9 @@ #define __PROCESSOR_H #include <bitutils.h> +#ifndef __ASSEMBLY__ +#include <ccan/str/str.h> +#endif /* P7 MSR bits */ #define MSR_SF PPC_BIT(0) /* 64-bit mode */ @@ -235,18 +238,18 @@ static inline void mtmsrd(unsigned long val, int l) asm volatile("mtmsrd %0,%1" : : "r"(val), "i"(l) : "memory"); } -static inline unsigned long mfspr(unsigned int spr) -{ - unsigned long val; - - asm volatile("mfspr %0,%1" : "=r"(val) : "i"(spr) : "memory"); - return val; -} - -static inline void mtspr(unsigned int spr, unsigned long val) -{ - asm volatile("mtspr %0,%1" : : "i"(spr), "r"(val) : "memory"); -} +#define mfspr(spr) ( \ +{ \ + unsigned long val; \ +\ + asm volatile("mfspr %0," stringify(spr) : "=r"(val) : : "memory"); \ + val; \ +}) + +#define mtspr(spr, val) (\ +{ \ + asm volatile("mtspr " stringify(spr) ",%0" : : "r"(val) : "memory"); \ +}) /* Helpers for special sequences needed by some registers */ extern void set_hid0(unsigned long hid0);
Fixes building skiboot without optimization. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> --- include/processor.h | 27 +++++++++++++++------------ 1 file changed, 15 insertions(+), 12 deletions(-)