diff mbox

libflash: fix 4bytes address enablement on BMC SPI flash

Message ID 1449482063-26182-1-git-send-email-clg@fr.ibm.com
State Accepted
Headers show

Commit Message

Cédric Le Goater Dec. 7, 2015, 9:54 a.m. UTC
commit e25f3f3559d9 ("libflash: enable 4b mode on BMC SPI flash") added
a setting for 4byte addresses on the BMC SPI flash when needed. This
setting should be only done for the BMC flash, which is not the case in
the current code. This patch fixes it.

Signed-off-by: Cédric Le Goater <clg@fr.ibm.com>
---

 I suppose we could have a ast_sf_set_4b() routine for each type of
 flash. Would it make the code clearer ? 

 hw/ast-bmc/ast-sf-ctrl.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Joel Stanley Dec. 7, 2015, 10:47 p.m. UTC | #1
On Mon, Dec 7, 2015 at 8:54 PM, Cédric Le Goater <clg@fr.ibm.com> wrote:
> commit e25f3f3559d9 ("libflash: enable 4b mode on BMC SPI flash") added
> a setting for 4byte addresses on the BMC SPI flash when needed. This
> setting should be only done for the BMC flash, which is not the case in
> the current code. This patch fixes it.

Well spotted. Thank you!

>
> Signed-off-by: Cédric Le Goater <clg@fr.ibm.com>

Reviewed-by: Joel Stanley <joel@jms.id.au>

> ---
>
>  I suppose we could have a ast_sf_set_4b() routine for each type of
>  flash. Would it make the code clearer ?

I tried your suggestion, and it makes the pnor case cleaner, but the
bmc case doesn't change much, and it does duplicate a bunch of code.

I think we should take this patch.

>
>  hw/ast-bmc/ast-sf-ctrl.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> Index: skiboot.git/hw/ast-bmc/ast-sf-ctrl.c
> ===================================================================
> --- skiboot.git.orig/hw/ast-bmc/ast-sf-ctrl.c
> +++ skiboot.git/hw/ast-bmc/ast-sf-ctrl.c
> @@ -178,7 +178,7 @@ static int ast_sf_set_4b(struct spi_flas
>         /* Update read mode */
>         ast_ahb_writel(ct->ctl_read_val, ct->ctl_reg);
>
> -       if (ce_ctrl)
> +       if (ce_ctrl && ct->type == AST_SF_TYPE_BMC)
>                 ast_ahb_writel(ce_ctrl, BMC_SPI_FCTL_CE_CTRL);
>
>         return 0;
>
Stewart Smith Dec. 14, 2015, 7:21 a.m. UTC | #2
Cédric Le Goater <clg@fr.ibm.com> writes:
> commit e25f3f3559d9 ("libflash: enable 4b mode on BMC SPI flash") added
> a setting for 4byte addresses on the BMC SPI flash when needed. This
> setting should be only done for the BMC flash, which is not the case in
> the current code. This patch fixes it.
>
> Signed-off-by: Cédric Le Goater <clg@fr.ibm.com>
> ---
>
>  I suppose we could have a ast_sf_set_4b() routine for each type of
>  flash. Would it make the code clearer ? 
>
>  hw/ast-bmc/ast-sf-ctrl.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Thanks! merged to master as of 6677d2c
diff mbox

Patch

Index: skiboot.git/hw/ast-bmc/ast-sf-ctrl.c
===================================================================
--- skiboot.git.orig/hw/ast-bmc/ast-sf-ctrl.c
+++ skiboot.git/hw/ast-bmc/ast-sf-ctrl.c
@@ -178,7 +178,7 @@  static int ast_sf_set_4b(struct spi_flas
 	/* Update read mode */
 	ast_ahb_writel(ct->ctl_read_val, ct->ctl_reg);
 
-	if (ce_ctrl)
+	if (ce_ctrl && ct->type == AST_SF_TYPE_BMC)
 		ast_ahb_writel(ce_ctrl, BMC_SPI_FCTL_CE_CTRL);
 
 	return 0;