From patchwork Wed Nov 18 21:12:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 546209 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 34567140761 for ; Thu, 19 Nov 2015 08:13:23 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 1D9FF1A040C for ; Thu, 19 Nov 2015 08:13:23 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from e37.co.us.ibm.com (e37.co.us.ibm.com [32.97.110.158]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 7257D1A038C for ; Thu, 19 Nov 2015 08:13:18 +1100 (AEDT) Received: from localhost by e37.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 18 Nov 2015 14:13:14 -0700 X-IBM-Helo: d03dlp02.boulder.ibm.com X-IBM-MailFrom: stewart@linux.vnet.ibm.com X-IBM-RcptTo: skiboot@lists.ozlabs.org Received: from b03cxnp08028.gho.boulder.ibm.com (b03cxnp08028.gho.boulder.ibm.com [9.17.130.20]) by d03dlp02.boulder.ibm.com (Postfix) with ESMTP id 60A423E4004C for ; Wed, 18 Nov 2015 14:13:11 -0700 (MST) Received: from d03av01.boulder.ibm.com (d03av01.boulder.ibm.com [9.17.195.167]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id tAILBfun53018734 for ; Wed, 18 Nov 2015 14:11:41 -0700 Received: from d03av01.boulder.ibm.com (localhost [127.0.0.1]) by d03av01.boulder.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id tAILDAY5012376 for ; Wed, 18 Nov 2015 14:13:10 -0700 Received: from oc8180480414.ibm.com ([9.81.199.205]) by d03av01.boulder.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with SMTP id tAILD0VH011591; Wed, 18 Nov 2015 14:13:09 -0700 Received: from ka1.ozlabs.ibm.com (localhost [127.0.0.1]) by oc8180480414.ibm.com (Postfix) with ESMTP id 22160345C; Thu, 19 Nov 2015 08:12:57 +1100 (AEDT) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Thu, 19 Nov 2015 08:12:52 +1100 Message-Id: <1447881172-16680-1-git-send-email-stewart@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.4 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15111821-0025-0000-0000-00001EE22EBE Subject: [Skiboot] [PATCH] RFC: Add SKIBOOT_CONFIG_FSP build option to enable/disable FSP support X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" A *very* early crack at having a build config option (I do *not* intend to merge this as is). We save around 197kb of space in skiboot.lid when built with SKIBOOT_CONFIG_FSP=0 (default is to enable). The end goal is to have a way to avoid the upcoming "oh no, we ran out of space in the 1MB pnor partition". Signed-off-by: Stewart Smith --- Makefile.main | 14 ++++++++++++++ asm/head.S | 8 ++++++++ core/fast-reboot.c | 2 ++ core/hostservices.c | 25 +++++++++++++++++++++---- core/init.c | 10 +++++++++- core/opal.c | 2 ++ core/vpd.c | 10 ++++++++++ hw/Makefile.inc | 2 ++ hw/occ.c | 8 ++++++++ hw/psi.c | 8 +++++++- include/fsp.h | 5 +++++ include/op-panel.h | 8 +++++++- platforms/Makefile.inc | 2 ++ 13 files changed, 97 insertions(+), 7 deletions(-) diff --git a/Makefile.main b/Makefile.main index c45eff5f9a2e..92f17f4ee6e5 100644 --- a/Makefile.main +++ b/Makefile.main @@ -69,6 +69,18 @@ ifeq ($(SKIBOOT_GCOV),1) CFLAGS += -fprofile-arcs -ftest-coverage -DSKIBOOT_GCOV=1 endif +ifeq ($(SKIBOOT_CONFIG_FSP),0) +CFLAGS += -DCONFIG_FSP=0 +HOSTCFLAGS += -DCONFIG_FSP=0 +ASFLAGS += -DCONFIG_FSP=0 +else +CFLAGS += -DCONFIG_FSP=1 +HOSTCFLAGS += -DCONFIG_FSP=1 +ASFLAGS += -DCONFIG_FSP=1 +SKIBOOT_CONFIG_FSP=1 +endif + + ifeq ($(STACK_CHECK),1) CFLAGS += -fstack-protector-all -pg CPPFLAGS += -DSTACK_CHECK_ENABLED @@ -144,7 +156,9 @@ include $(SRC)/libflash/Makefile.inc include $(SRC)/libpore/Makefile.inc include $(SRC)/libc/Makefile.inc include $(SRC)/ccan/Makefile.inc +ifeq ($(SKIBOOT_CONFIG_FSP),1) include $(SRC)/$(DEVSRC)/Makefile.inc +endif # hack for travis-ci and coverity gard: diff --git a/asm/head.S b/asm/head.S index 6963188463ae..3e0be808269e 100644 --- a/asm/head.S +++ b/asm/head.S @@ -735,7 +735,11 @@ naca: .llong hv_release_data /* 0x0018 : HV release data */ .llong 0 /* 0x0020 : Reserved */ .llong 0 /* 0x0028 : Reserved */ +#if CONFIG_FSP .llong spira /* 0x0030 : SP Interface Root */ +#else + .llong 0 +#endif .llong hv_lid_load_table /* 0x0038 : LID load table */ .llong 0 /* 0x0040 : Reserved */ .space 68 @@ -778,7 +782,11 @@ hv_lid_load_table: opal_naca: .llong opal_boot_trampoline /* Primary entry (used ?) */ .llong opal_boot_trampoline /* Secondary entry (used ?) */ +#if CONFIG_FSP .llong spira /* Spira pointer */ +#else + .llong 0 +#endif .llong 0 /* Load address */ .llong opal_boot_trampoline /* 0x180 trampoline */ .llong 0 /* More stuff as seen in objdump ...*/ diff --git a/core/fast-reboot.c b/core/fast-reboot.c index 30b77e9bc294..4e798bcec82a 100644 --- a/core/fast-reboot.c +++ b/core/fast-reboot.c @@ -322,8 +322,10 @@ void __noreturn fast_reboot(void) /* Set our state to active */ this_cpu()->state = cpu_state_active; +#if CONFIG_FSP /* Poke the consoles (see comments in the code there) */ fsp_console_reset(); +#endif /* Reset/EOI the PSI interrupt */ psi_irq_reset(); diff --git a/core/hostservices.c b/core/hostservices.c index 672b57f883cf..76480a13b935 100644 --- a/core/hostservices.c +++ b/core/hostservices.c @@ -265,10 +265,13 @@ struct hbrt_elog_ent { struct list_node link; }; static LIST_HEAD(hbrt_elogs); +#if CONFIG_FSP static struct lock hbrt_elog_lock = LOCK_UNLOCKED; static bool hbrt_elog_sending; static void hservice_start_elog_send(void); +#endif /* CONFIG_FSP */ +#if CONFIG_FSP == 1 static void hservice_elog_write_complete(struct fsp_msg *msg) { struct hbrt_elog_ent *ent = msg->user_data; @@ -290,7 +293,7 @@ static void hservice_start_elog_send(void) struct fsp_msg *msg; struct hbrt_elog_ent *ent; - again: +again: if (list_empty(&hbrt_elogs)) return; ent = list_pop(&hbrt_elogs, struct hbrt_elog_ent, link); @@ -314,7 +317,7 @@ static void hservice_start_elog_send(void) if (!fsp_queue_msg(msg, hservice_elog_write_complete)) return; prerror("FSP: Error queueing elog update\n"); - error: +error: if (msg) fsp_freemsg(msg); fsp_tce_unmap(PSI_DMA_HBRT_LOG_WRITE_BUF, @@ -324,12 +327,18 @@ static void hservice_start_elog_send(void) hbrt_elog_sending = false; goto again; } +#endif /* CONFIG_FSP */ static int hservice_send_error_log(uint32_t plid, uint32_t dsize, void *data) { +#if CONFIG_FSP struct hbrt_elog_ent *ent; void *abuf; - +#else + (void)plid; + (void)dsize; + (void)data; +#endif prlog(PR_ERR, "HBRT: Error log generated with plid 0x%08x\n", plid); /* We only know how to send error logs to FSP */ @@ -337,6 +346,7 @@ static int hservice_send_error_log(uint32_t plid, uint32_t dsize, void *data) prerror("HBRT: Warning, error log from HBRT discarded !\n"); return OPAL_UNSUPPORTED; } +#if CONFIG_FSP if (dsize > PSI_DMA_HBRT_LOG_WRITE_BUF_SZ) { prerror("HBRT: Warning, error log from HBRT too big (%d) !\n", dsize); @@ -368,7 +378,7 @@ static int hservice_send_error_log(uint32_t plid, uint32_t dsize, void *data) if (!hbrt_elog_sending) hservice_start_elog_send(); unlock(&hbrt_elog_lock); - +#endif /* CONFIG_FSP */ return 0; } @@ -394,6 +404,7 @@ struct hbrt_lid { }; static LIST_HEAD(hbrt_lid_list); +#if CONFIG_FSP static bool hbrt_lid_preload_complete = false; bool hservices_lid_preload_complete(void) @@ -509,6 +520,7 @@ static int hservice_lid_unload(void *buf __unused) /* We do nothing as the LID is held in cache */ return 0; } +#endif /* CONFIG_FSP */ static uint64_t hservice_get_reserved_mem(const char *name) { @@ -757,8 +769,13 @@ static struct host_interfaces hinterface = { .send_error_log = hservice_send_error_log, .scom_read = hservice_scom_read, .scom_write = hservice_scom_write, +#if CONFIG_FSP .lid_load = hservice_lid_load, .lid_unload = hservice_lid_unload, +#else + .lid_load = NULL, + .lid_unload = NULL, +#endif .get_reserved_mem = hservice_get_reserved_mem, .wakeup = hservice_wakeup, .nanosleep = hservice_nanosleep, diff --git a/core/init.c b/core/init.c index 54a5735f8239..98b97c50884b 100644 --- a/core/init.c +++ b/core/init.c @@ -16,7 +16,9 @@ #include #include +#if CONFIG_FSP == 1 #include +#endif #include #include #include @@ -408,6 +410,7 @@ void __noreturn load_and_boot_kernel(bool is_reboot) ipmi_set_fw_progress_sensor(IPMI_FW_OS_BOOT); +#if CONFIG_FSP == 1 if (!is_reboot) { /* We wait for the nvram read to complete here so we can * grab stuff from there such as the kernel arguments @@ -418,7 +421,7 @@ void __noreturn load_and_boot_kernel(bool is_reboot) fsp_code_update_wait_vpd(true); } fsp_console_select_stdout(); - +#endif /* * OCC takes few secs to boot. Call this as late as * as possible to avoid delay. @@ -552,6 +555,7 @@ static void do_ctors(void) void __noreturn main_cpu_entry(const void *fdt, u32 master_cpu) { + (void)master_cpu; /* * WARNING: At this point. the timebases have * *not* been synchronized yet. Do not use any timebase @@ -608,11 +612,15 @@ void __noreturn main_cpu_entry(const void *fdt, u32 master_cpu) * Hack alert: When entering via the OPAL entry point, fdt * is set to -1, we record that and pass it to parse_hdat */ +#if CONFIG_FSP if (fdt == (void *)-1ul) parse_hdat(true, master_cpu); else if (fdt == NULL) parse_hdat(false, master_cpu); else { +#else + { +#endif /* CONFIG_FSP */ dt_expand(fdt); } diff --git a/core/opal.c b/core/opal.c index b6411f0c9b06..bc635aa52693 100644 --- a/core/opal.c +++ b/core/opal.c @@ -329,7 +329,9 @@ static int64_t opal_poll_events(__be64 *outstanding_event_mask) /* Test the host initiated reset */ if (hir_trigger == 0xdeadbeef) { +#if CONFIG_FSP == 1 fsp_trigger_reset(); +#endif hir_trigger = 0; } diff --git a/core/vpd.c b/core/vpd.c index 85a993730946..85c80c52c8b6 100644 --- a/core/vpd.c +++ b/core/vpd.c @@ -116,12 +116,17 @@ const void *vpd_find(const void *vpd, size_t vpd_size, } static void *vpd; +#if CONFIG_FSP static size_t vpd_size; static uint32_t vpd_lid_no; +#endif /* Helper to load a VPD LID. Pass a ptr to the corresponding LX keyword */ static void *vpd_lid_preload(const uint8_t *lx) { +#if !CONFIG_FSP + (void)lx; +#else int rc; /* Now this is a guess game as we don't have the info from the @@ -166,11 +171,15 @@ static void *vpd_lid_preload(const uint8_t *lx) return vpd; fail: free(vpd); +#endif /* CONFIG_FSP */ return NULL; } void vpd_iohub_load(struct dt_node *hub_node) { +#if !CONFIG_FSP + (void)hub_node; +#else char record[4] = "LXR0"; const void *valid_lx; uint8_t lx_size; @@ -225,6 +234,7 @@ void vpd_iohub_load(struct dt_node *hub_node) fail: free(vpd); vpd = NULL; +#endif /* CONFIG_FSP */ prerror("VPD: Failed to load VPD LID\n"); return; } diff --git a/hw/Makefile.inc b/hw/Makefile.inc index a9dd9f1fc0bd..72c470a4e7b9 100644 --- a/hw/Makefile.inc +++ b/hw/Makefile.inc @@ -9,7 +9,9 @@ HW_OBJS += phb3.o sfc-ctrl.o fake-rtc.o bt.o p8-i2c.o prd.o HW_OBJS += dts.o lpc-rtc.o npu.o npu-hw-procedures.o HW=hw/built-in.o +ifeq ($(SKIBOOT_CONFIG_FSP),1) include $(SRC)/hw/fsp/Makefile.inc +endif include $(SRC)/hw/ec/Makefile.inc include $(SRC)/hw/ast-bmc/Makefile.inc include $(SRC)/hw/ipmi/Makefile.inc diff --git a/hw/occ.c b/hw/occ.c index 0e3d95366b20..a2dfb1d618c9 100644 --- a/hw/occ.c +++ b/hw/occ.c @@ -62,6 +62,7 @@ struct occ_pstate_table { struct occ_pstate_entry pstates[MAX_PSTATES]; }; +#if CONFIG_FSP == 1 DEFINE_LOG_ENTRY(OPAL_RC_OCC_LOAD, OPAL_PLATFORM_ERR_EVT, OPAL_OCC, OPAL_CEC_HARDWARE, OPAL_PREDICTIVE_ERR_GENERAL, OPAL_NA); @@ -69,6 +70,7 @@ DEFINE_LOG_ENTRY(OPAL_RC_OCC_LOAD, OPAL_PLATFORM_ERR_EVT, OPAL_OCC, DEFINE_LOG_ENTRY(OPAL_RC_OCC_RESET, OPAL_PLATFORM_ERR_EVT, OPAL_OCC, OPAL_CEC_HARDWARE, OPAL_PREDICTIVE_ERR_GENERAL, OPAL_NA); +#endif DEFINE_LOG_ENTRY(OPAL_RC_OCC_PSTATE_INIT, OPAL_PLATFORM_ERR_EVT, OPAL_OCC, OPAL_CEC_HARDWARE, OPAL_INFO, @@ -497,6 +499,7 @@ int find_master_and_slave_occ(uint64_t **master, uint64_t **slave, } return 0; } +#if CONFIG_FSP == 1 static void occ_queue_load(u8 scope, u32 dbob_id, u32 seq_id) { @@ -717,6 +720,7 @@ static void occ_do_reset(u8 scope, u32 dbob_id, u32 seq_id) } } } +#endif /* CONFIG_FSP */ #define PV_OCC_GP0 0x01000000 #define PV_OCC_GP0_AND 0x01000004 @@ -746,6 +750,7 @@ void occ_pnor_set_owner(enum pnor_owner owner) occ_pnor_set_one_owner(chip->id, owner); } +#if CONFIG_FSP static bool fsp_occ_msg(u32 cmd_sub_mod, struct fsp_msg *msg) { u32 dbob_id, seq_id; @@ -787,6 +792,7 @@ static bool fsp_occ_msg(u32 cmd_sub_mod, struct fsp_msg *msg) static struct fsp_client fsp_occ_client = { .message = fsp_occ_msg, }; +#endif /* CONFIG_FSP */ #define OCB_OCI_OCCMISC 0x6a020 #define OCB_OCI_OCCMISC_AND 0x6a021 @@ -857,6 +863,7 @@ void occ_interrupt(uint32_t chip_id) xscom_write(chip_id, OCB_OCI_OCCMISC_OR, OCB_OCI_OCIMISC_IRQ); } +#if CONFIG_FSP == 1 void occ_fsp_init(void) { /* OCC is P8 only */ @@ -867,5 +874,6 @@ void occ_fsp_init(void) if (fsp_present()) fsp_register_client(&fsp_occ_client, FSP_MCLASS_OCC); } +#endif /* CONFIG_FSP */ diff --git a/hw/psi.c b/hw/psi.c index 0823ec80f268..d0cfb085c86f 100644 --- a/hw/psi.c +++ b/hw/psi.c @@ -196,7 +196,9 @@ static void psi_link_poll(void *data __unused) psi_activate_phb(psi); psi_set_link_polling(false); unlock(&psi_lock); +#if CONFIG_FSP fsp_reinit_fsp(); +#endif /* CONFIG_FSP */ return; } } @@ -381,8 +383,10 @@ static void psi_interrupt(void *data, uint32_t isn __unused) */ if (!psi->active) psi_spurious_fsp_irq(psi); +#if CONFIG_FSP else fsp_interrupt(); +#endif /* CONFIG_FSP */ } /* P8 additional interrupt? */ @@ -392,7 +396,9 @@ static void psi_interrupt(void *data, uint32_t isn __unused) /* Poll the console buffers on any interrupt since we don't * get send notifications */ - fsp_console_poll(NULL); +#if CONFIG_FSP + fsp_console_poll(NULL); +#endif } static int64_t psi_p7_set_xive(void *data, uint32_t isn __unused, diff --git a/include/fsp.h b/include/fsp.h index a61bd58eb239..a2b068bb5689 100644 --- a/include/fsp.h +++ b/include/fsp.h @@ -24,6 +24,10 @@ #include #include +#if !CONFIG_FSP +static inline bool fsp_present(void) { return false; } +#else + /* Current max number of FSPs * one primary and one secondary is all we support */ @@ -831,4 +835,5 @@ extern void fsp_chiptod_init(void); /* Terminate immediate */ extern void __attribute__((noreturn)) ibm_fsp_terminate(const char *msg); +#endif /* CONFIG_FSP */ #endif /* __FSP_H */ diff --git a/include/op-panel.h b/include/op-panel.h index dfb4e11a376d..1277827a2b38 100644 --- a/include/op-panel.h +++ b/include/op-panel.h @@ -57,11 +57,17 @@ enum op_module { * 'BA070002' : MS VPD doesn't have an MSAC * 'BA070003' : MS VPD doesn't have a total config */ - +#if CONFIG_FSP extern void op_display(enum op_severity, enum op_module, uint16_t code); extern void op_panel_disable_src_echo(void); extern void op_panel_clear_src(void); +#else +static inline void op_display(enum op_severity s, enum op_module m, uint16_t code) { (void)s; (void)m; (void)code; } +static inline void op_panel_disable_src_echo(void) {} +static inline void op_panel_clear_src(void) {} +#endif /* CONFIG_FSP */ + extern void fsp_oppanel_init(void); #endif /* __OP_PANEL_H */ diff --git a/platforms/Makefile.inc b/platforms/Makefile.inc index 90cd0f1c3762..e31d48f69809 100644 --- a/platforms/Makefile.inc +++ b/platforms/Makefile.inc @@ -3,7 +3,9 @@ PLATDIR = platforms SUBDIRS += $(PLATDIR) PLATFORMS = $(PLATDIR)/built-in.o +ifeq ($(SKIBOOT_CONFIG_FSP),1) include $(SRC)/$(PLATDIR)/ibm-fsp/Makefile.inc +endif include $(SRC)/$(PLATDIR)/rhesus/Makefile.inc include $(SRC)/$(PLATDIR)/astbmc/Makefile.inc include $(SRC)/$(PLATDIR)/mambo/Makefile.inc