@@ -112,10 +112,56 @@ int load_catalogue_lid(int loaded)
void nest_pmu_init(int loaded)
{
+ struct proc_chip *chip;
+ struct dt_node *dev, *chip_dev;
+ u64 addr=0;
+
if (load_catalogue_lid(loaded)) {
printf("Nest_IMA: IMA Catalog lid failed to load\n");
return;
}
+ /*
+ * Now that we have Chip level events enabled,
+ * lets create DT entries. This is a top level directory under /
+ * for nest pmu units.
+ */
+ dev = dt_new(dt_root, "nest-ima");
+ if (!dev) {
+ prlog(PR_DEBUG,"Nest_IMA: nest-ima dev creation failed \n");
+ return;
+ }
+
+ /*
+ * Start exposing per-chip SLW_IMA FW offset in HOMER Region.
+ */
+ for_each_chip(chip) {
+ chip_dev = dt_new_addr(dev, "ima-chip", chip->id);
+ if (!chip_dev) {
+ prlog(PR_DEBUG,"Nest_IMA: ima-chip dev creation failed \n");
+ return;
+ }
+
+ /*
+ * Design:
+ * PORE_SLW_IMA FW will program Nest counters with
+ * pre-defined set of events (provided in catalog) and dump
+ * counter data in a fixed HOMER offset.
+ *
+ * HOMER Region layout has reserved memory for
+ * PORE_SLW_IMA FW starting from 0x320000 to 0x39FFFF
+ *
+ * PORE_SLW_IMA uses this region to dump different Nest unit
+ * counter data. This address is passed to kernel as base
+ * address to map. Individual counter offsets are passed
+ * in the event file.
+ */
+ dt_add_property_cells(chip_dev, "ibm,chip-id", chip->id);
+ addr = chip->homer_base + SLW_IMA_OFFSET;
+ dt_add_property_u64(chip_dev, "reg", addr);
+ dt_add_property_cells(chip_dev, "size", SLW_IMA_SIZE);
+ dt_add_property(chip_dev, "ibm,ima-chip", NULL, 0);
+ }
+
return;
}
Patch adds device-tree creation code to pass per-chip PORE_SLW_IMA HOMER offset to kernel. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> --- hw/nest.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+)