diff mbox series

[V7,3/3] rtc: zynqmp: Updated calibration value

Message ID 20220610113709.2646118-3-srinivas.neeli@xilinx.com
State Superseded
Headers show
Series [V7,1/3] dt-bindings: rtc: zynqmp: Add clock information | expand

Commit Message

Srinivas Neeli June 10, 2022, 11:37 a.m. UTC
As per RTC spec default calibration value is 0x7FFF.

Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
---
Changes in V7:
-New patch
-TRM not updated yet, Internal design document contains 0x7FFF as
 default value. TRM Will update in next release.
---
 drivers/rtc/rtc-zynqmp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Alexandre Belloni June 10, 2022, 12:03 p.m. UTC | #1
On 10/06/2022 17:07:09+0530, Srinivas Neeli wrote:
> As per RTC spec default calibration value is 0x7FFF.
> 

Having that as a second patch breaks the calculation in your previous
patch, really, this should just be a single patch.

> Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
> ---
> Changes in V7:
> -New patch
> -TRM not updated yet, Internal design document contains 0x7FFF as
>  default value. TRM Will update in next release.
> ---
>  drivers/rtc/rtc-zynqmp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
> index 39b23f88ee26..1dd389b891fe 100644
> --- a/drivers/rtc/rtc-zynqmp.c
> +++ b/drivers/rtc/rtc-zynqmp.c
> @@ -37,7 +37,7 @@
>  #define RTC_OSC_EN		BIT(24)
>  #define RTC_BATT_EN		BIT(31)
>  
> -#define RTC_CALIB_DEF		0x198233
> +#define RTC_CALIB_DEF		0x7FFF
>  #define RTC_CALIB_MASK		0x1FFFFF
>  #define RTC_ALRM_MASK          BIT(1)
>  #define RTC_MSEC               1000
> -- 
> 2.25.1
>
Srinivas Neeli June 10, 2022, 3:04 p.m. UTC | #2
[AMD Official Use Only - General]

Hi,

> -----Original Message-----
> From: Alexandre Belloni <alexandre.belloni@bootlin.com>
> Sent: Friday, June 10, 2022 5:34 PM
> To: Srinivas Neeli <srinivas.neeli@xilinx.com>
> Cc: a.zummo@towertech.it; robh+dt@kernel.org;
> krzysztof.kozlowski+dt@linaro.org; michal.simek@xilinx.com;
> sgoud@xilinx.com; shubhraj@xilinx.com; Neeli, Srinivas
> <srinivas.neeli@amd.com>; neelisrinivas18@gmail.com;
> devicetree@vger.kernel.org; linux-rtc@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; git@xilinx.com
> Subject: Re: [PATCH V7 3/3] rtc: zynqmp: Updated calibration value
>
> On 10/06/2022 17:07:09+0530, Srinivas Neeli wrote:
> > As per RTC spec default calibration value is 0x7FFF.
> >
>
> Having that as a second patch breaks the calculation in your previous patch,
> really, this should just be a single patch.

Can I swap 3/3 and 2/3, Will that be fine ?.

>
> > Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
> > ---
> > Changes in V7:
> > -New patch
> > -TRM not updated yet, Internal design document contains 0x7FFF as
> > default value. TRM Will update in next release.
> > ---
> >  drivers/rtc/rtc-zynqmp.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c index
> > 39b23f88ee26..1dd389b891fe 100644
> > --- a/drivers/rtc/rtc-zynqmp.c
> > +++ b/drivers/rtc/rtc-zynqmp.c
> > @@ -37,7 +37,7 @@
> >  #define RTC_OSC_EN         BIT(24)
> >  #define RTC_BATT_EN                BIT(31)
> >
> > -#define RTC_CALIB_DEF              0x198233
> > +#define RTC_CALIB_DEF              0x7FFF
> >  #define RTC_CALIB_MASK             0x1FFFFF
> >  #define RTC_ALRM_MASK          BIT(1)
> >  #define RTC_MSEC               1000
> > --
> > 2.25.1
> >
>
> --
> Alexandre Belloni, co-owner and COO, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
Alexandre Belloni June 11, 2022, 2:48 p.m. UTC | #3
On 10/06/2022 15:04:31+0000, Neeli, Srinivas wrote:
> [AMD Official Use Only - General]
> 
> Hi,
> 
> > -----Original Message-----
> > From: Alexandre Belloni <alexandre.belloni@bootlin.com>
> > Sent: Friday, June 10, 2022 5:34 PM
> > To: Srinivas Neeli <srinivas.neeli@xilinx.com>
> > Cc: a.zummo@towertech.it; robh+dt@kernel.org;
> > krzysztof.kozlowski+dt@linaro.org; michal.simek@xilinx.com;
> > sgoud@xilinx.com; shubhraj@xilinx.com; Neeli, Srinivas
> > <srinivas.neeli@amd.com>; neelisrinivas18@gmail.com;
> > devicetree@vger.kernel.org; linux-rtc@vger.kernel.org; linux-arm-
> > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; git@xilinx.com
> > Subject: Re: [PATCH V7 3/3] rtc: zynqmp: Updated calibration value
> >
> > On 10/06/2022 17:07:09+0530, Srinivas Neeli wrote:
> > > As per RTC spec default calibration value is 0x7FFF.
> > >
> >
> > Having that as a second patch breaks the calculation in your previous patch,
> > really, this should just be a single patch.
> 
> Can I swap 3/3 and 2/3, Will that be fine ?.

That would be better, yes

> 
> >
> > > Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
> > > ---
> > > Changes in V7:
> > > -New patch
> > > -TRM not updated yet, Internal design document contains 0x7FFF as
> > > default value. TRM Will update in next release.
> > > ---
> > >  drivers/rtc/rtc-zynqmp.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c index
> > > 39b23f88ee26..1dd389b891fe 100644
> > > --- a/drivers/rtc/rtc-zynqmp.c
> > > +++ b/drivers/rtc/rtc-zynqmp.c
> > > @@ -37,7 +37,7 @@
> > >  #define RTC_OSC_EN         BIT(24)
> > >  #define RTC_BATT_EN                BIT(31)
> > >
> > > -#define RTC_CALIB_DEF              0x198233
> > > +#define RTC_CALIB_DEF              0x7FFF
> > >  #define RTC_CALIB_MASK             0x1FFFFF
> > >  #define RTC_ALRM_MASK          BIT(1)
> > >  #define RTC_MSEC               1000
> > > --
> > > 2.25.1
> > >
> >
> > --
> > Alexandre Belloni, co-owner and COO, Bootlin
> > Embedded Linux and Kernel engineering
> > https://bootlin.com
diff mbox series

Patch

diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
index 39b23f88ee26..1dd389b891fe 100644
--- a/drivers/rtc/rtc-zynqmp.c
+++ b/drivers/rtc/rtc-zynqmp.c
@@ -37,7 +37,7 @@ 
 #define RTC_OSC_EN		BIT(24)
 #define RTC_BATT_EN		BIT(31)
 
-#define RTC_CALIB_DEF		0x198233
+#define RTC_CALIB_DEF		0x7FFF
 #define RTC_CALIB_MASK		0x1FFFFF
 #define RTC_ALRM_MASK          BIT(1)
 #define RTC_MSEC               1000