diff mbox series

[v6,2/4] rtc: goldfish: use __raw_writel()/__raw_readl()

Message ID 20220113201920.3201760-3-laurent@vivier.eu
State Superseded
Headers show
Series m68k: Add Virtual M68k Machine | expand

Commit Message

Laurent Vivier Jan. 13, 2022, 8:19 p.m. UTC
As android implementation defines the endianness of the device is the one
of the architecture replace all writel()/readl() by
__raw_writel()/__raw_readl()

https://android.googlesource.com/platform/external/qemu/+/refs/heads/emu-master-dev/hw/timer/goldfish_timer.c#177

The same change has been done for goldfish-tty:

  commit da31de35cd2f ("tty: goldfish: use __raw_writel()/__raw_readl()")

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 drivers/rtc/rtc-goldfish.c | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

Comments

Jiaxun Yang Jan. 13, 2022, 9:18 p.m. UTC | #1
在2022年1月13日一月 下午8:19,Laurent Vivier写道:
> As android implementation defines the endianness of the device is the one
> of the architecture replace all writel()/readl() by
> __raw_writel()/__raw_readl()
>
> https://android.googlesource.com/platform/external/qemu/+/refs/heads/emu-master-dev/hw/timer/goldfish_timer.c#177
>
> The same change has been done for goldfish-tty:
>
>   commit da31de35cd2f ("tty: goldfish: use __raw_writel()/__raw_readl()")
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>

Acked-by: Jiauxn Yang <jiaxun.yang@flygoat.com>

Well I do think it's a mistake by Android. They only considered little endian as they only have little endian devices.

But given that the implementation is already a part of QEMU, we must live with that :-)

Thanks.

> ---
>  drivers/rtc/rtc-goldfish.c | 30 +++++++++++++++---------------
>  1 file changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/rtc/rtc-goldfish.c b/drivers/rtc/rtc-goldfish.c
> index 7ab95d052644..3e76160d40b9 100644
> --- a/drivers/rtc/rtc-goldfish.c
> +++ b/drivers/rtc/rtc-goldfish.c
> @@ -41,8 +41,8 @@ static int goldfish_rtc_read_alarm(struct device *dev,
>  	rtcdrv = dev_get_drvdata(dev);
>  	base = rtcdrv->base;
> 
> -	rtc_alarm_low = readl(base + TIMER_ALARM_LOW);
> -	rtc_alarm_high = readl(base + TIMER_ALARM_HIGH);
> +	rtc_alarm_low = __raw_readl(base + TIMER_ALARM_LOW);
> +	rtc_alarm_high = __raw_readl(base + TIMER_ALARM_HIGH);
>  	rtc_alarm = (rtc_alarm_high << 32) | rtc_alarm_low;
> 
>  	do_div(rtc_alarm, NSEC_PER_SEC);
> @@ -50,7 +50,7 @@ static int goldfish_rtc_read_alarm(struct device *dev,
> 
>  	rtc_time64_to_tm(rtc_alarm, &alrm->time);
> 
> -	if (readl(base + TIMER_ALARM_STATUS))
> +	if (__raw_readl(base + TIMER_ALARM_STATUS))
>  		alrm->enabled = 1;
>  	else
>  		alrm->enabled = 0;
> @@ -71,18 +71,18 @@ static int goldfish_rtc_set_alarm(struct device *dev,
> 
>  	if (alrm->enabled) {
>  		rtc_alarm64 = rtc_tm_to_time64(&alrm->time) * NSEC_PER_SEC;
> -		writel((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
> -		writel(rtc_alarm64, base + TIMER_ALARM_LOW);
> -		writel(1, base + TIMER_IRQ_ENABLED);
> +		__raw_writel((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
> +		__raw_writel(rtc_alarm64, base + TIMER_ALARM_LOW);
> +		__raw_writel(1, base + TIMER_IRQ_ENABLED);
>  	} else {
>  		/*
>  		 * if this function was called with enabled=0
>  		 * then it could mean that the application is
>  		 * trying to cancel an ongoing alarm
>  		 */
> -		rtc_status_reg = readl(base + TIMER_ALARM_STATUS);
> +		rtc_status_reg = __raw_readl(base + TIMER_ALARM_STATUS);
>  		if (rtc_status_reg)
> -			writel(1, base + TIMER_CLEAR_ALARM);
> +			__raw_writel(1, base + TIMER_CLEAR_ALARM);
>  	}
> 
>  	return 0;
> @@ -98,9 +98,9 @@ static int goldfish_rtc_alarm_irq_enable(struct device *dev,
>  	base = rtcdrv->base;
> 
>  	if (enabled)
> -		writel(1, base + TIMER_IRQ_ENABLED);
> +		__raw_writel(1, base + TIMER_IRQ_ENABLED);
>  	else
> -		writel(0, base + TIMER_IRQ_ENABLED);
> +		__raw_writel(0, base + TIMER_IRQ_ENABLED);
> 
>  	return 0;
>  }
> @@ -110,7 +110,7 @@ static irqreturn_t goldfish_rtc_interrupt(int irq, 
> void *dev_id)
>  	struct goldfish_rtc *rtcdrv = dev_id;
>  	void __iomem *base = rtcdrv->base;
> 
> -	writel(1, base + TIMER_CLEAR_INTERRUPT);
> +	__raw_writel(1, base + TIMER_CLEAR_INTERRUPT);
> 
>  	rtc_update_irq(rtcdrv->rtc, 1, RTC_IRQF | RTC_AF);
> 
> @@ -128,8 +128,8 @@ static int goldfish_rtc_read_time(struct device 
> *dev, struct rtc_time *tm)
>  	rtcdrv = dev_get_drvdata(dev);
>  	base = rtcdrv->base;
> 
> -	time_low = readl(base + TIMER_TIME_LOW);
> -	time_high = readl(base + TIMER_TIME_HIGH);
> +	time_low = __raw_readl(base + TIMER_TIME_LOW);
> +	time_high = __raw_readl(base + TIMER_TIME_HIGH);
>  	time = (time_high << 32) | time_low;
> 
>  	do_div(time, NSEC_PER_SEC);
> @@ -149,8 +149,8 @@ static int goldfish_rtc_set_time(struct device 
> *dev, struct rtc_time *tm)
>  	base = rtcdrv->base;
> 
>  	now64 = rtc_tm_to_time64(tm) * NSEC_PER_SEC;
> -	writel((now64 >> 32), base + TIMER_TIME_HIGH);
> -	writel(now64, base + TIMER_TIME_LOW);
> +	__raw_writel((now64 >> 32), base + TIMER_TIME_HIGH);
> +	__raw_writel(now64, base + TIMER_TIME_LOW);
> 
>  	return 0;
>  }
> -- 
> 2.34.1
Arnd Bergmann Jan. 14, 2022, 6:57 a.m. UTC | #2
On Thu, Jan 13, 2022 at 9:19 PM Laurent Vivier <laurent@vivier.eu> wrote:
>
> As android implementation defines the endianness of the device is the one
> of the architecture replace all writel()/readl() by
> __raw_writel()/__raw_readl()
>
> https://android.googlesource.com/platform/external/qemu/+/refs/heads/emu-master-dev/hw/timer/goldfish_timer.c#177
>
> The same change has been done for goldfish-tty:
>
>   commit da31de35cd2f ("tty: goldfish: use __raw_writel()/__raw_readl()")
>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>

__raw_readl() isn't really the correct interface though, this is not
well-defined to have
a particular meaning at all, and doesn't guarantee atomicity or a
particular endianess
across architectures.

I'd suggest defining a set of goldfish specific accessors per
architecture that turn
into either readl() or swabl(readl()), to allow future architectures
to define this
properly in qemu.

         Arnd
John Paul Adrian Glaubitz Jan. 14, 2022, 11:07 a.m. UTC | #3
Hi Laurent!

On 1/13/22 21:19, Laurent Vivier wrote:
> As android implementation defines the endianness of the device is the one
> of the architecture replace all writel()/readl() by
> __raw_writel()/__raw_readl()

I think this sentence is a little hard to understand. Can you rephrase it in
case you are sending another version of the series?

Adrian
diff mbox series

Patch

diff --git a/drivers/rtc/rtc-goldfish.c b/drivers/rtc/rtc-goldfish.c
index 7ab95d052644..3e76160d40b9 100644
--- a/drivers/rtc/rtc-goldfish.c
+++ b/drivers/rtc/rtc-goldfish.c
@@ -41,8 +41,8 @@  static int goldfish_rtc_read_alarm(struct device *dev,
 	rtcdrv = dev_get_drvdata(dev);
 	base = rtcdrv->base;
 
-	rtc_alarm_low = readl(base + TIMER_ALARM_LOW);
-	rtc_alarm_high = readl(base + TIMER_ALARM_HIGH);
+	rtc_alarm_low = __raw_readl(base + TIMER_ALARM_LOW);
+	rtc_alarm_high = __raw_readl(base + TIMER_ALARM_HIGH);
 	rtc_alarm = (rtc_alarm_high << 32) | rtc_alarm_low;
 
 	do_div(rtc_alarm, NSEC_PER_SEC);
@@ -50,7 +50,7 @@  static int goldfish_rtc_read_alarm(struct device *dev,
 
 	rtc_time64_to_tm(rtc_alarm, &alrm->time);
 
-	if (readl(base + TIMER_ALARM_STATUS))
+	if (__raw_readl(base + TIMER_ALARM_STATUS))
 		alrm->enabled = 1;
 	else
 		alrm->enabled = 0;
@@ -71,18 +71,18 @@  static int goldfish_rtc_set_alarm(struct device *dev,
 
 	if (alrm->enabled) {
 		rtc_alarm64 = rtc_tm_to_time64(&alrm->time) * NSEC_PER_SEC;
-		writel((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
-		writel(rtc_alarm64, base + TIMER_ALARM_LOW);
-		writel(1, base + TIMER_IRQ_ENABLED);
+		__raw_writel((rtc_alarm64 >> 32), base + TIMER_ALARM_HIGH);
+		__raw_writel(rtc_alarm64, base + TIMER_ALARM_LOW);
+		__raw_writel(1, base + TIMER_IRQ_ENABLED);
 	} else {
 		/*
 		 * if this function was called with enabled=0
 		 * then it could mean that the application is
 		 * trying to cancel an ongoing alarm
 		 */
-		rtc_status_reg = readl(base + TIMER_ALARM_STATUS);
+		rtc_status_reg = __raw_readl(base + TIMER_ALARM_STATUS);
 		if (rtc_status_reg)
-			writel(1, base + TIMER_CLEAR_ALARM);
+			__raw_writel(1, base + TIMER_CLEAR_ALARM);
 	}
 
 	return 0;
@@ -98,9 +98,9 @@  static int goldfish_rtc_alarm_irq_enable(struct device *dev,
 	base = rtcdrv->base;
 
 	if (enabled)
-		writel(1, base + TIMER_IRQ_ENABLED);
+		__raw_writel(1, base + TIMER_IRQ_ENABLED);
 	else
-		writel(0, base + TIMER_IRQ_ENABLED);
+		__raw_writel(0, base + TIMER_IRQ_ENABLED);
 
 	return 0;
 }
@@ -110,7 +110,7 @@  static irqreturn_t goldfish_rtc_interrupt(int irq, void *dev_id)
 	struct goldfish_rtc *rtcdrv = dev_id;
 	void __iomem *base = rtcdrv->base;
 
-	writel(1, base + TIMER_CLEAR_INTERRUPT);
+	__raw_writel(1, base + TIMER_CLEAR_INTERRUPT);
 
 	rtc_update_irq(rtcdrv->rtc, 1, RTC_IRQF | RTC_AF);
 
@@ -128,8 +128,8 @@  static int goldfish_rtc_read_time(struct device *dev, struct rtc_time *tm)
 	rtcdrv = dev_get_drvdata(dev);
 	base = rtcdrv->base;
 
-	time_low = readl(base + TIMER_TIME_LOW);
-	time_high = readl(base + TIMER_TIME_HIGH);
+	time_low = __raw_readl(base + TIMER_TIME_LOW);
+	time_high = __raw_readl(base + TIMER_TIME_HIGH);
 	time = (time_high << 32) | time_low;
 
 	do_div(time, NSEC_PER_SEC);
@@ -149,8 +149,8 @@  static int goldfish_rtc_set_time(struct device *dev, struct rtc_time *tm)
 	base = rtcdrv->base;
 
 	now64 = rtc_tm_to_time64(tm) * NSEC_PER_SEC;
-	writel((now64 >> 32), base + TIMER_TIME_HIGH);
-	writel(now64, base + TIMER_TIME_LOW);
+	__raw_writel((now64 >> 32), base + TIMER_TIME_HIGH);
+	__raw_writel(now64, base + TIMER_TIME_LOW);
 
 	return 0;
 }