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Wed, 22 May 2013 18:04:55 -0700 (PDT) Received: from ketosis.mtv.corp.google.com (ketosis.mtv.corp.google.com [172.22.73.143]) by corp2gmr1-1.hot.corp.google.com (Postfix) with ESMTP id CF48C31C034; Wed, 22 May 2013 18:04:54 -0700 (PDT) Received: by ketosis.mtv.corp.google.com (Postfix, from userid 171518) id 70092808A7; Wed, 22 May 2013 18:04:54 -0700 (PDT) From: Derek Basehore To: linux-kernel@vger.kernel.org Cc: rtc-linux@googlegroups.com, Alessandro Zummo , akpm@linux-foundation.org, rostedt@goodmis.org, gregkh@linuxfoundation.org, Derek Basehore Subject: [rtc-linux] [PATCH] rtc: cmos: Fix accidentally enabling rtc channel Date: Wed, 22 May 2013 18:04:05 -0700 Message-Id: <1369271045-17410-1-git-send-email-dbasehore@chromium.org> X-Mailer: git-send-email 1.8.2.1 X-Gm-Message-State: ALoCoQlUFQRqLZ+pyB2kCjYFwm3GRQtJw4Ty49VlKzzqqyiuo2kfHP42Fig2nhYz2AWkVc3+tdB1VFv3pNKPmLhbri5KHYlTJv/XPQFYng43tZ/VLQYXj+Xn3tE4ee1vEOTX+VNXJyH0P6oq3nAWS2Sg8kdjneDSW2N5zgx0w/9cKaBl/Rm4FUYrc9S+YegGTlZRFRQCtPj3qW1eCBXU75kkcrVLQht4qg== X-Original-Sender: dbasehore@chromium.org X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: domain of dbasehore@google.com designates 209.85.220.201 as permitted sender) smtp.mail=dbasehore@google.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , During resume, we call hpet_rtc_timer_init after masking an irq bit in hpet. This will cause the call to hpet_disable_rtc_channel to be undone if RTC_AIE is the only bit not masked. Signed-off-by: Derek Basehore --- drivers/rtc/rtc-cmos.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c index cc5bea9..ee0bc69 100644 --- a/drivers/rtc/rtc-cmos.c +++ b/drivers/rtc/rtc-cmos.c @@ -854,6 +854,10 @@ static int cmos_resume(struct device *dev) } spin_lock_irq(&rtc_lock); + if (device_may_wakeup(dev)) { + hpet_rtc_timer_init(); + } + do { CMOS_WRITE(tmp, RTC_CONTROL); hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); @@ -869,7 +873,6 @@ static int cmos_resume(struct device *dev) rtc_update_irq(cmos->rtc, 1, mask); tmp &= ~RTC_AIE; hpet_mask_rtc_irq_bit(RTC_AIE); - hpet_rtc_timer_init(); } while (mask & RTC_AIE); spin_unlock_irq(&rtc_lock); }