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[66.31.16.167]) by smtp.gmail.com with ESMTPSA id t1-20020ac865c1000000b003a7e4129f83sm19425602qto.85.2023.01.03.21.25.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Jan 2023 21:25:21 -0800 (PST) From: Dennis Lambe Jr To: Alessandro Zummo , Alexandre Belloni , Krzysztof Kozlowski , Rob Herring Cc: Atsushi Nemoto , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org, Dennis Lambe Jr Subject: [PATCH v2 0/3] rtc: Set M41T82 & M41T83 xtal load capacitance from DT Date: Wed, 4 Jan 2023 05:25:03 +0000 Message-Id: <20230104052506.575619-1-dennis@sparkcharge.io> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-rtc@vger.kernel.org I haven't heard any feedback on this series aside from the dt-bindings, but with the holidays I'm not assuming that means they're perfect. I don't want to sit on the fixes I've already incorporated any longer though, so here's v2. Changes in v2: * dt-bindings: remove accidental wakeup-sources line suggested by Krzysztof Kozlowski * spelling fixes in changelogs The m41t82 and m41t83 have an adjustable internal capacitance that defaults to 25 pF per xtal pin. This patch series adds the ability to configure it via the devicetree. Patch 1 just changes `#ifdef CONFIG_OF` to `if (IS_ENABLED(CONFIG_OF))` in m41t80_probe() so that I don't need to use __maybe_unused on my new functions and variables. Patch 2 is the dt-bindings. Patch 3 is the actual feature implementation. The desired capacitance comes from the quartz-load-femtofarads property, following the example of two other RTC ICs that have adjustable internal load capacitance, the NXP pcf85063 and pcf8523. The m41t82 and m41t83 support much finer-grained control over the capacitance than those chips, and ST calls the feature "analog calibration", but it looks to me like it's essentially the same kind of thing. My use case for this is: ST specifies not to add any additional external load capacitance[1], but the MikroElektronika RTC 9 Click board[2] has a 22 pF cap on each xtal pin[3]. The resulting combined capacitance appears to be outside of the operating range of the xtal, because when power is removed from the boards I'm testing with, the RTC reports an Oscillator-Fail flag on the next power on. I found I could work around the problem by reducing the internal load capacitance as low as it will go. References: [1] https://www.st.com/resource/en/application_note/an3060-applications-guide-for-serial-realtime-clocks-rtcs-stmicroelectronics.pdf [2] https://www.mikroe.com/rtc-9-click [3] https://download.mikroe.com/documents/add-on-boards/click/rtc-9/rtc-9-click-schematic-v100.pdf Previous versions: v1: https://lore.kernel.org/linux-rtc/20221219190915.3912384-1-dennis@sparkcharge.io/T/ Dennis Lambe Jr (3): rtc: m41t80: probe: use IS_ENABLED for CONFIG_OF dt-bindings: m41t80: add xtal load capacitance rtc: m41t80: set xtal load capacitance from DT .../devicetree/bindings/rtc/st,m41t80.yaml | 16 ++++ drivers/rtc/rtc-m41t80.c | 84 +++++++++++++++++-- 2 files changed, 92 insertions(+), 8 deletions(-)