| Message ID | 529adc7705fb3e3e777439895bdaa136bacb9403.1664021647.git.balaton@eik.bme.hu |
|---|---|
| State | Accepted |
| Headers | show |
| Series | ppc4xx_sdram QOMify and clean ups | expand |
On 9/24/22 09:27, BALATON Zoltan wrote: > In ppc4xx_sdram_init() the struct is allocated with g_new0() so no > need to clear its elements. In the bamboo machine init memset can be > replaced with array initialiser which is shorter. > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> > --- Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> > hw/ppc/ppc440_bamboo.c | 6 ++---- > hw/ppc/ppc4xx_devs.c | 8 ++------ > 2 files changed, 4 insertions(+), 10 deletions(-) > > diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c > index ea945a1c99..5ec82fa8c2 100644 > --- a/hw/ppc/ppc440_bamboo.c > +++ b/hw/ppc/ppc440_bamboo.c > @@ -169,8 +169,8 @@ static void bamboo_init(MachineState *machine) > MemoryRegion *address_space_mem = get_system_memory(); > MemoryRegion *isa = g_new(MemoryRegion, 1); > MemoryRegion *ram_memories = g_new(MemoryRegion, PPC440EP_SDRAM_NR_BANKS); > - hwaddr ram_bases[PPC440EP_SDRAM_NR_BANKS]; > - hwaddr ram_sizes[PPC440EP_SDRAM_NR_BANKS]; > + hwaddr ram_bases[PPC440EP_SDRAM_NR_BANKS] = {0}; > + hwaddr ram_sizes[PPC440EP_SDRAM_NR_BANKS] = {0}; > PCIBus *pcibus; > PowerPCCPU *cpu; > CPUPPCState *env; > @@ -205,8 +205,6 @@ static void bamboo_init(MachineState *machine) > qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT)); > > /* SDRAM controller */ > - memset(ram_bases, 0, sizeof(ram_bases)); > - memset(ram_sizes, 0, sizeof(ram_sizes)); > ppc4xx_sdram_banks(machine->ram, PPC440EP_SDRAM_NR_BANKS, ram_memories, > ram_bases, ram_sizes, ppc440ep_sdram_bank_sizes); > /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */ > diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c > index ce38ae65e6..b4cd10f735 100644 > --- a/hw/ppc/ppc4xx_devs.c > +++ b/hw/ppc/ppc4xx_devs.c > @@ -363,12 +363,8 @@ void ppc4xx_sdram_init(CPUPPCState *env, qemu_irq irq, int nbanks, > sdram->irq = irq; > sdram->nbanks = nbanks; > sdram->ram_memories = ram_memories; > - memset(sdram->ram_bases, 0, 4 * sizeof(hwaddr)); > - memcpy(sdram->ram_bases, ram_bases, > - nbanks * sizeof(hwaddr)); > - memset(sdram->ram_sizes, 0, 4 * sizeof(hwaddr)); > - memcpy(sdram->ram_sizes, ram_sizes, > - nbanks * sizeof(hwaddr)); > + memcpy(sdram->ram_bases, ram_bases, nbanks * sizeof(hwaddr)); > + memcpy(sdram->ram_sizes, ram_sizes, nbanks * sizeof(hwaddr)); > qemu_register_reset(&sdram_reset, sdram); > ppc_dcr_register(env, SDRAM0_CFGADDR, > sdram, &dcr_read_sdram, &dcr_write_sdram);
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index ea945a1c99..5ec82fa8c2 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -169,8 +169,8 @@ static void bamboo_init(MachineState *machine) MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *isa = g_new(MemoryRegion, 1); MemoryRegion *ram_memories = g_new(MemoryRegion, PPC440EP_SDRAM_NR_BANKS); - hwaddr ram_bases[PPC440EP_SDRAM_NR_BANKS]; - hwaddr ram_sizes[PPC440EP_SDRAM_NR_BANKS]; + hwaddr ram_bases[PPC440EP_SDRAM_NR_BANKS] = {0}; + hwaddr ram_sizes[PPC440EP_SDRAM_NR_BANKS] = {0}; PCIBus *pcibus; PowerPCCPU *cpu; CPUPPCState *env; @@ -205,8 +205,6 @@ static void bamboo_init(MachineState *machine) qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT)); /* SDRAM controller */ - memset(ram_bases, 0, sizeof(ram_bases)); - memset(ram_sizes, 0, sizeof(ram_sizes)); ppc4xx_sdram_banks(machine->ram, PPC440EP_SDRAM_NR_BANKS, ram_memories, ram_bases, ram_sizes, ppc440ep_sdram_bank_sizes); /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */ diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index ce38ae65e6..b4cd10f735 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -363,12 +363,8 @@ void ppc4xx_sdram_init(CPUPPCState *env, qemu_irq irq, int nbanks, sdram->irq = irq; sdram->nbanks = nbanks; sdram->ram_memories = ram_memories; - memset(sdram->ram_bases, 0, 4 * sizeof(hwaddr)); - memcpy(sdram->ram_bases, ram_bases, - nbanks * sizeof(hwaddr)); - memset(sdram->ram_sizes, 0, 4 * sizeof(hwaddr)); - memcpy(sdram->ram_sizes, ram_sizes, - nbanks * sizeof(hwaddr)); + memcpy(sdram->ram_bases, ram_bases, nbanks * sizeof(hwaddr)); + memcpy(sdram->ram_sizes, ram_sizes, nbanks * sizeof(hwaddr)); qemu_register_reset(&sdram_reset, sdram); ppc_dcr_register(env, SDRAM0_CFGADDR, sdram, &dcr_read_sdram, &dcr_write_sdram);
In ppc4xx_sdram_init() the struct is allocated with g_new0() so no need to clear its elements. In the bamboo machine init memset can be replaced with array initialiser which is shorter. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> --- hw/ppc/ppc440_bamboo.c | 6 ++---- hw/ppc/ppc4xx_devs.c | 8 ++------ 2 files changed, 4 insertions(+), 10 deletions(-)