diff mbox series

[PULL,03/96] spapr: Free stdout path

Message ID	20240725235410.451624-4-npiggin@gmail.com
State	New
Headers	show Return-Path: <qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org> From: Nicholas Piggin <npiggin@gmail.com> To: qemu-devel@nongnu.org Cc: Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org, Akihiko Odaki <akihiko.odaki@daynix.com>, =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= <philmd@linaro.org>, "Michael S . Tsirkin" <mst@redhat.com> Subject: [PULL 03/96] spapr: Free stdout path Date: Fri, 26 Jul 2024 09:52:36 +1000 Message-ID: <20240725235410.451624-4-npiggin@gmail.com> In-Reply-To: <20240725235410.451624-1-npiggin@gmail.com> References: <20240725235410.451624-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=npiggin@gmail.com; helo=mail-pj1-x1036.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org
Series	[PULL,01/96] tests/tcg: Skip failing ppc64 multi-threaded tests \| expand [PULL,01/96] tests/tcg: Skip failing ppc64 multi-threaded tests [PULL,02/96] spapr: Migrate ail-mode-3 spapr cap [PULL,03/96] spapr: Free stdout path [PULL,04/96] ppc/vof: Fix unaligned FDT property access [PULL,05/96] accel/kvm: Introduce kvm_create_and_park_vcpu() helper [PULL,06/96] cpu-common.c: export cpu_get_free_index to be reused later [PULL,07/96] target/ppc: handle vcpu hotplug failure gracefully [PULL,08/96] target/ppc/arch_dump: set prstatus pid to cpuid [PULL,09/96] linux-header: PPC: KVM: Update one-reg ids for DEXCR, HASHKEYR and HASHPKEYR [PULL,10/96] target/ppc/cpu_init: Synchronize DEXCR with KVM for migration [PULL,11/96] target/ppc/cpu_init: Synchronize HASHKEYR with KVM for migration [PULL,12/96] target/ppc/cpu_init: Synchronize HASHPKEYR with KVM for migration [PULL,13/96] ppc/pnv: Update Power10's cfam id to use Power10 DD2 [PULL,14/96] ppc/pnv: Fix loss of LPC SERIRQ interrupts [PULL,15/96] ppc/pnv: Implement POWER9 LPC PSI serirq outputs and auto-clear function [PULL,16/96] ppc/pnv: Begin a more complete ADU LPC model for POWER9/10 [PULL,17/96] ppc/pnv: Implement ADU access to LPC space [PULL,18/96] target/ppc: Fix msgsnd for POWER8 [PULL,19/96] ppc/pnv: Add pointer from PnvCPUState to PnvCore [PULL,20/96] ppc/pnv: Move timebase state into PnvCore [PULL,21/96] target/ppc: Move SPR indirect registers into PnvCore [PULL,22/96] ppc/pnv: use class attribute to limit SMT threads for different machines [PULL,23/96] ppc/pnv: Extend chip_pir class method to TIR as well [PULL,24/96] ppc: Add a core_index to CPUPPCState for SMT vCPUs [PULL,25/96] target/ppc: Add helpers to check for SMT sibling threads [PULL,26/96] ppc: Add has_smt_siblings property to CPUPPCState [PULL,27/96] ppc/pnv: Add a big-core mode that joins two regular cores [PULL,28/96] ppc/pnv: Add allow for big-core differences in DT generation [PULL,29/96] ppc/pnv: Implement big-core PVR for Power9/10 [PULL,30/96] ppc/pnv: Implement Power9 CPU core thread state indirect register [PULL,31/96] ppc/pnv: Add POWER10 ChipTOD quirk for big-core [PULL,32/96] ppc/pnv: Add big-core machine property [PULL,33/96] ppc/pnv: Add a CPU nmi and resume function [PULL,34/96] ppc/pnv: Implement POWER10 PC xscom registers for direct controls [PULL,35/96] ppc/pnv: Add an LPAR per core machine option [PULL,36/96] ppc/pnv: Remove ppc target dependency from pnv_xscom.h [PULL,37/96] hw/ssi: Add SPI model [PULL,38/96] hw/ssi: Extend SPI model [PULL,39/96] hw/block: Add Microchip's 25CSM04 to m25p80 [PULL,40/96] hw/ppc: SPI controller wiring to P10 chip [PULL,41/96] tests/qtest: Add pnv-spi-seeprom qtest [PULL,42/96] pnv/xive2: XIVE2 Cache Watch, Cache Flush and Sync Injection support [PULL,43/96] pnv/xive2: Structure/define alignment changes [PULL,44/96] pnv/xive: Support cache flush and queue sync inject with notifications [PULL,45/96] pnv/xive2: Add NVG and NVC to cache watch facility [PULL,46/96] pnv/xive2: Configure Virtualization Structure Tables through the PC [PULL,47/96] pnv/xive2: Enable VST NVG and NVC index compression [PULL,48/96] pnv/xive2: Set Translation Table for the NVC port space [PULL,49/96] pnv/xive2: Fail VST entry address computation if table has no VSD [PULL,50/96] pnv/xive2: Move xive2_nvp_pic_print_info() to xive2.c [PULL,51/96] pnv/xive2: Refine TIMA 'info pic' output [PULL,52/96] pnv/xive2: Dump more END state with 'info pic' [PULL,53/96] target/ppc: Move VMX integer add/sub saturate insns to decodetree. [PULL,54/96] target/ppc: Improve VMX integer add/sub saturate instructions. [PULL,55/96] target/ppc: Move ISA300 flag check out of do_helper_XX3. [PULL,56/96] target/ppc: Move VSX arithmetic and max/min insns to decodetree. [PULL,57/96] target/ppc: Move VSX logical instructions to decodetree. [PULL,58/96] target/ppc: Moving VSX scalar storage access insns to decodetree. [PULL,59/96] target/ppc: Move VSX vector with length storage access insns to decodetree. [PULL,60/96] target/ppc: Move VSX vector storage access insns to decodetree. [PULL,61/96] target/ppc: Move VSX fp compare insns to decodetree. [PULL,62/96] target/ppc: Move get/set_avr64 functions to vmx-impl.c.inc. [PULL,63/96] target/ppc: Update VMX storage access insns to use tcg_gen_qemu_ld/st_i128. [PULL,64/96] target/ppc : Update VSX storage access insns to use tcg_gen_qemu _ld/st_i128. [PULL,65/96] target/ppc: Reorganise and rename ppc_hash32_pp_prot() [PULL,66/96] target/ppc/mmu_common.c: Remove local name for a constant [PULL,67/96] target/ppc/mmu_common.c: Remove single use local variable [PULL,68/96] target/ppc/mmu_common.c: Remove single use local variable [PULL,69/96] target/ppc/mmu_common.c: Remove another single use local variable [PULL,70/96] target/ppc/mmu_common.c: Remove yet another single use local variable [PULL,71/96] target/ppc/mmu_common.c: Return directly in ppc6xx_tlb_pte_check() [PULL,72/96] target/ppc/mmu_common.c: Simplify ppc6xx_tlb_pte_check() [PULL,73/96] target/ppc/mmu_common.c: Remove unused field from mmu_ctx_t [PULL,74/96] target/ppc/mmu_common.c: Remove hash field from mmu_ctx_t [PULL,75/96] target/ppc/mmu_common.c: Remove pte_update_flags() [PULL,76/96] target/ppc/mmu_common.c: Remove nx field from mmu_ctx_t [PULL,77/96] target/ppc/mmu_common.c: Convert local variable to bool [PULL,78/96] target/ppc/mmu_common.c: Remove single use local variable [PULL,79/96] target/ppc/mmu_common.c: Simplify a switch statement [PULL,80/96] target/ppc/mmu_common.c: Inline and remove ppc6xx_tlb_pte_check() [PULL,81/96] target/ppc/mmu_common.c: Remove ptem field from mmu_ctx_t [PULL,82/96] target/ppc: Add function to get protection key for hash32 MMU [PULL,83/96] target/ppc/mmu-hash32.c: Inline and remove ppc_hash32_pte_prot() [PULL,84/96] target/ppc/mmu_common.c: Init variable in function that relies on it [PULL,85/96] target/ppc/mmu_common.c: Remove key field from mmu_ctx_t [PULL,86/96] target/ppc/mmu_common.c: Stop using ctx in ppc6xx_tlb_check() [PULL,87/96] target/ppc/mmu_common.c: Rename function parameter [PULL,88/96] target/ppc/mmu_common.c: Use defines instead of numeric constants [PULL,89/96] target/ppc: Remove bat_size_prot() [PULL,90/96] target/ppc/mmu_common.c: Stop using ctx in get_bat_6xx_tlb() [PULL,91/96] target/ppc/mmu_common.c: Remove mmu_ctx_t [PULL,92/96] target/ppc/mmu-hash32.c: Inline and remove ppc_hash32_pte_raddr() [PULL,93/96] target/ppc/mmu-hash32.c: Move get_pteg_offset32() to the header [PULL,94/96] target/ppc: Unexport some functions from mmu-book3s-v3.h [PULL,95/96] target/ppc/mmu-radix64: Remove externally unused parts from header [PULL,96/96] target/ppc: Remove includes from mmu-book3s-v3.h

Commit Message

Nicholas Piggin July 25, 2024, 11:52 p.m. UTC

From: Akihiko Odaki <akihiko.odaki@daynix.com>

This fixes LeakSanitizer warnings.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 hw/ppc/spapr_vof.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff mbox series

Patch

diff --git a/hw/ppc/spapr_vof.c b/hw/ppc/spapr_vof.c
index 09f29be0b9..c02eaacfed 100644
--- a/hw/ppc/spapr_vof.c
+++ b/hw/ppc/spapr_vof.c
@@ -28,7 +28,7 @@  target_ulong spapr_h_vof_client(PowerPCCPU *cpu, SpaprMachineState *spapr,
 
 void spapr_vof_client_dt_finalize(SpaprMachineState *spapr, void *fdt)
 {
-    char *stdout_path = spapr_vio_stdout_path(spapr->vio_bus);
+    g_autofree char *stdout_path = spapr_vio_stdout_path(spapr->vio_bus);
 
     vof_build_dt(fdt, spapr->vof);