| Message ID | 20220215214148.1848266-17-farosas@linux.ibm.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/ppc: SPR registration cleanups | expand |
On Tue, Feb 15, 2022 at 06:41:37PM -0300, Fabiano Rosas wrote: > Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Rationale for this only becomes clear at patch 18/27, a commit message would have helped. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> > --- > target/ppc/cpu_init.c | 64 +++++++++++++++++++++++-------------------- > 1 file changed, 35 insertions(+), 29 deletions(-) > > diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c > index ddd27c21ae..adda07e56d 100644 > --- a/target/ppc/cpu_init.c > +++ b/target/ppc/cpu_init.c > @@ -768,6 +768,40 @@ static void register_603_sprs(CPUPPCState *env) > 0x00000000); > } > > +static void register_e300_sprs(CPUPPCState *env) > +{ > + /* hardware implementation registers */ > + spr_register(env, SPR_HID2, "HID2", > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + 0x00000000); > + /* Breakpoints */ > + spr_register(env, SPR_DABR, "DABR", > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + 0x00000000); > + > + spr_register(env, SPR_DABR2, "DABR2", > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + 0x00000000); > + > + spr_register(env, SPR_IABR2, "IABR2", > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + 0x00000000); > + > + spr_register(env, SPR_IBCR, "IBCR", > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + 0x00000000); > + > + spr_register(env, SPR_DBCR, "DBCR", > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + 0x00000000); > +} > + > /* SPR specific to PowerPC G2 implementation */ > static void register_G2_sprs(CPUPPCState *env) > { > @@ -3217,36 +3251,8 @@ static void init_proc_e300(CPUPPCState *env) > register_ne_601_sprs(env); > register_sdr1_sprs(env); > register_603_sprs(env); > - /* hardware implementation registers */ > - spr_register(env, SPR_HID2, "HID2", > - SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > - 0x00000000); > - /* Breakpoints */ > - spr_register(env, SPR_DABR, "DABR", > - SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > - 0x00000000); > + register_e300_sprs(env); > > - spr_register(env, SPR_DABR2, "DABR2", > - SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > - 0x00000000); > - > - spr_register(env, SPR_IABR2, "IABR2", > - SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > - 0x00000000); > - > - spr_register(env, SPR_IBCR, "IBCR", > - SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > - 0x00000000); > - > - spr_register(env, SPR_DBCR, "DBCR", > - SPR_NOACCESS, SPR_NOACCESS, > - &spr_read_generic, &spr_write_generic, > - 0x00000000); > /* Memory management */ > register_low_BATs(env); > register_high_BATs(env);
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index ddd27c21ae..adda07e56d 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -768,6 +768,40 @@ static void register_603_sprs(CPUPPCState *env) 0x00000000); } +static void register_e300_sprs(CPUPPCState *env) +{ + /* hardware implementation registers */ + spr_register(env, SPR_HID2, "HID2", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0x00000000); + /* Breakpoints */ + spr_register(env, SPR_DABR, "DABR", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0x00000000); + + spr_register(env, SPR_DABR2, "DABR2", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0x00000000); + + spr_register(env, SPR_IABR2, "IABR2", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0x00000000); + + spr_register(env, SPR_IBCR, "IBCR", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0x00000000); + + spr_register(env, SPR_DBCR, "DBCR", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0x00000000); +} + /* SPR specific to PowerPC G2 implementation */ static void register_G2_sprs(CPUPPCState *env) { @@ -3217,36 +3251,8 @@ static void init_proc_e300(CPUPPCState *env) register_ne_601_sprs(env); register_sdr1_sprs(env); register_603_sprs(env); - /* hardware implementation registers */ - spr_register(env, SPR_HID2, "HID2", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, - 0x00000000); - /* Breakpoints */ - spr_register(env, SPR_DABR, "DABR", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, - 0x00000000); + register_e300_sprs(env); - spr_register(env, SPR_DABR2, "DABR2", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, - 0x00000000); - - spr_register(env, SPR_IABR2, "IABR2", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, - 0x00000000); - - spr_register(env, SPR_IBCR, "IBCR", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, - 0x00000000); - - spr_register(env, SPR_DBCR, "DBCR", - SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_generic, - 0x00000000); /* Memory management */ register_low_BATs(env); register_high_BATs(env);
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> --- target/ppc/cpu_init.c | 64 +++++++++++++++++++++++-------------------- 1 file changed, 35 insertions(+), 29 deletions(-)