diff mbox series

[15/27] target/ppc: cpu_init: Move 755 L2 cache SPRs into a function

Message ID 20220215214148.1848266-16-farosas@linux.ibm.com
State Superseded
Headers show
Series target/ppc: SPR registration cleanups | expand

Commit Message

Fabiano Rosas Feb. 15, 2022, 9:41 p.m. UTC 
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
---
 target/ppc/cpu_init.c | 24 +++++++++++++++---------
 1 file changed, 15 insertions(+), 9 deletions(-)

Comments

David Gibson Feb. 16, 2022, 2:24 a.m. UTC | #1 
On Tue, Feb 15, 2022 at 06:41:36PM -0300, Fabiano Rosas wrote:
> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>

There's only one caller of the new function, and no commit message, so
the rationale for splitting these out isn't obvious.

> ---
>  target/ppc/cpu_init.c | 24 +++++++++++++++---------
>  1 file changed, 15 insertions(+), 9 deletions(-)
> 
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index 03aa543814..ddd27c21ae 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -503,6 +503,20 @@ static void register_755_sprs(CPUPPCState *env)
>                   0x00000000);
>  }
>  
> +static void register_755_L2_cache_sprs(CPUPPCState *env)
> +{
> +    /* L2 cache control */
> +    spr_register(env, SPR_L2CR, "L2CR",
> +                 SPR_NOACCESS, SPR_NOACCESS,
> +                 &spr_read_generic, spr_access_nop,
> +                 0x00000000);
> +
> +    spr_register(env, SPR_L2PMCR, "L2PMCR",
> +                 SPR_NOACCESS, SPR_NOACCESS,
> +                 &spr_read_generic, &spr_write_generic,
> +                 0x00000000);
> +}
> +
>  /* SPR common to all 7xx PowerPC implementations */
>  static void register_7xx_sprs(CPUPPCState *env)
>  {
> @@ -4549,16 +4563,8 @@ static void init_proc_755(CPUPPCState *env)
>      register_sdr1_sprs(env);
>      register_7xx_sprs(env);
>      register_755_sprs(env);
> -    /* L2 cache control */
> -    spr_register(env, SPR_L2CR, "L2CR",
> -                 SPR_NOACCESS, SPR_NOACCESS,
> -                 &spr_read_generic, spr_access_nop,
> -                 0x00000000);
> +    register_755_L2_cache_sprs(env);
>  
> -    spr_register(env, SPR_L2PMCR, "L2PMCR",
> -                 SPR_NOACCESS, SPR_NOACCESS,
> -                 &spr_read_generic, &spr_write_generic,
> -                 0x00000000);
>      /* Thermal management */
>      register_thrm_sprs(env);
>
David Gibson Feb. 16, 2022, 2:52 a.m. UTC | #2 
On Wed, Feb 16, 2022 at 01:24:55PM +1100, David Gibson wrote:
> On Tue, Feb 15, 2022 at 06:41:36PM -0300, Fabiano Rosas wrote:
> > Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
> 
> There's only one caller of the new function, and no commit message, so
> the rationale for splitting these out isn't obvious.

Ok, saw the later patch that makes this clear, so altough a commit
message would have smoothed that over:

Reviewed-by: David Gibson <david@gibson.dropbear.id.au>

> 
> > ---
> >  target/ppc/cpu_init.c | 24 +++++++++++++++---------
> >  1 file changed, 15 insertions(+), 9 deletions(-)
> > 
> > diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> > index 03aa543814..ddd27c21ae 100644
> > --- a/target/ppc/cpu_init.c
> > +++ b/target/ppc/cpu_init.c
> > @@ -503,6 +503,20 @@ static void register_755_sprs(CPUPPCState *env)
> >                   0x00000000);
> >  }
> >  
> > +static void register_755_L2_cache_sprs(CPUPPCState *env)
> > +{
> > +    /* L2 cache control */
> > +    spr_register(env, SPR_L2CR, "L2CR",
> > +                 SPR_NOACCESS, SPR_NOACCESS,
> > +                 &spr_read_generic, spr_access_nop,
> > +                 0x00000000);
> > +
> > +    spr_register(env, SPR_L2PMCR, "L2PMCR",
> > +                 SPR_NOACCESS, SPR_NOACCESS,
> > +                 &spr_read_generic, &spr_write_generic,
> > +                 0x00000000);
> > +}
> > +
> >  /* SPR common to all 7xx PowerPC implementations */
> >  static void register_7xx_sprs(CPUPPCState *env)
> >  {
> > @@ -4549,16 +4563,8 @@ static void init_proc_755(CPUPPCState *env)
> >      register_sdr1_sprs(env);
> >      register_7xx_sprs(env);
> >      register_755_sprs(env);
> > -    /* L2 cache control */
> > -    spr_register(env, SPR_L2CR, "L2CR",
> > -                 SPR_NOACCESS, SPR_NOACCESS,
> > -                 &spr_read_generic, spr_access_nop,
> > -                 0x00000000);
> > +    register_755_L2_cache_sprs(env);
> >  
> > -    spr_register(env, SPR_L2PMCR, "L2PMCR",
> > -                 SPR_NOACCESS, SPR_NOACCESS,
> > -                 &spr_read_generic, &spr_write_generic,
> > -                 0x00000000);
> >      /* Thermal management */
> >      register_thrm_sprs(env);
> >  
>
diff mbox series

Patch

diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 03aa543814..ddd27c21ae 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -503,6 +503,20 @@  static void register_755_sprs(CPUPPCState *env)
                  0x00000000);
 }
 
+static void register_755_L2_cache_sprs(CPUPPCState *env)
+{
+    /* L2 cache control */
+    spr_register(env, SPR_L2CR, "L2CR",
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, spr_access_nop,
+                 0x00000000);
+
+    spr_register(env, SPR_L2PMCR, "L2PMCR",
+                 SPR_NOACCESS, SPR_NOACCESS,
+                 &spr_read_generic, &spr_write_generic,
+                 0x00000000);
+}
+
 /* SPR common to all 7xx PowerPC implementations */
 static void register_7xx_sprs(CPUPPCState *env)
 {
@@ -4549,16 +4563,8 @@  static void init_proc_755(CPUPPCState *env)
     register_sdr1_sprs(env);
     register_7xx_sprs(env);
     register_755_sprs(env);
-    /* L2 cache control */
-    spr_register(env, SPR_L2CR, "L2CR",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, spr_access_nop,
-                 0x00000000);
+    register_755_L2_cache_sprs(env);
 
-    spr_register(env, SPR_L2PMCR, "L2PMCR",
-                 SPR_NOACCESS, SPR_NOACCESS,
-                 &spr_read_generic, &spr_write_generic,
-                 0x00000000);
     /* Thermal management */
     register_thrm_sprs(env);