mbox series

[v6,0/9] pnv/phb5: Update PHB4 to the latest PHB5 spec

Message ID 20260831123005.1485518-1-saif.abrar@linux.ibm.com
Headers show
Series pnv/phb5: Update PHB4 to the latest PHB5 spec | expand

Message

Saif Abrar Aug. 31, 2026, 12:29 p.m. UTC 
Hello,
This patchset resolves the review comments for v5:
https://lore.kernel.org/qemu-devel/20260617095058.652789-1-saif.abrar@linux.ibm.com/

Major updates include the following:
- Separate reset and register read/write methods for PHB5.
- PHB4 and PHB5 specific reset values.
- Read/write logic for registers added and removed in PHB5.
- General cleanups.

Tested with 'make check' and 'make check-functional-ppc64'.

Regards.

Saif Abrar (9):
  qtest/phb5: Add testbench for PHB
  pnv/phb5: Add reset logic to PHB5
  pnv/phb5: Implement sticky reset logic in PHB5
  pnv/phb5: Implement read-only and write-only bits of registers
  pnv/phb5: Implement write-clear and return 1's on unimplemented reg
    read
  pnv/phb5: Set link-active status in HPSTAT and LMR registers
  pnv/phb5: Set link speed and width in the DLP training control
    register
  pnv/phb5: Implement IODA PCT table
  pnv/phb5: Mask off LSI Source-ID based on number of interrupts

 hw/pci-host/pnv_phb.c               |  20 +-
 hw/pci-host/pnv_phb4.c              | 552 +++++++++++++++++++++++++---
 hw/pci-host/pnv_phb4_pec.c          |   2 +-
 hw/pci-host/pnv_phb5.c              | 197 +++++++++-
 hw/pci-host/pnv_phb5_pec.c          |   1 +
 hw/ppc/pnv.c                        |   1 +
 include/hw/pci-host/pnv_phb4.h      |  43 ++-
 include/hw/pci-host/pnv_phb4_regs.h |  58 ++-
 include/hw/pci-host/pnv_phb5.h      |  52 +++
 tests/qtest/meson.build             |   1 +
 tests/qtest/pnv-host-i2c-test.c     |  13 +-
 tests/qtest/pnv-phb-test.c          | 235 ++++++++++++
 tests/qtest/pnv-qtest-common.h      |  24 ++
 tests/qtest/pnv-xive2-common.h      |   7 +-
 14 files changed, 1102 insertions(+), 104 deletions(-)
 create mode 100644 include/hw/pci-host/pnv_phb5.h
 create mode 100644 tests/qtest/pnv-phb-test.c
 create mode 100644 tests/qtest/pnv-qtest-common.h

Comments

Mike Kowal Sept. 3, 2026, 5:02 p.m. UTC | #1 
Reviewed-by: Michael Kowal<kowal@linux.ibm.com>

Thanks, MAK


On 8/31/2026 7:29 AM, Saif Abrar wrote:
> Hello,
> This patchset resolves the review comments for v5:
> https://lore.kernel.org/qemu-devel/20260617095058.652789-1-saif.abrar@linux.ibm.com/
>
> Major updates include the following:
> - Separate reset and register read/write methods for PHB5.
> - PHB4 and PHB5 specific reset values.
> - Read/write logic for registers added and removed in PHB5.
> - General cleanups.
>
> Tested with 'make check' and 'make check-functional-ppc64'.
>
> Regards.
>
> Saif Abrar (9):
>    qtest/phb5: Add testbench for PHB
>    pnv/phb5: Add reset logic to PHB5
>    pnv/phb5: Implement sticky reset logic in PHB5
>    pnv/phb5: Implement read-only and write-only bits of registers
>    pnv/phb5: Implement write-clear and return 1's on unimplemented reg
>      read
>    pnv/phb5: Set link-active status in HPSTAT and LMR registers
>    pnv/phb5: Set link speed and width in the DLP training control
>      register
>    pnv/phb5: Implement IODA PCT table
>    pnv/phb5: Mask off LSI Source-ID based on number of interrupts
>
>   hw/pci-host/pnv_phb.c               |  20 +-
>   hw/pci-host/pnv_phb4.c              | 552 +++++++++++++++++++++++++---
>   hw/pci-host/pnv_phb4_pec.c          |   2 +-
>   hw/pci-host/pnv_phb5.c              | 197 +++++++++-
>   hw/pci-host/pnv_phb5_pec.c          |   1 +
>   hw/ppc/pnv.c                        |   1 +
>   include/hw/pci-host/pnv_phb4.h      |  43 ++-
>   include/hw/pci-host/pnv_phb4_regs.h |  58 ++-
>   include/hw/pci-host/pnv_phb5.h      |  52 +++
>   tests/qtest/meson.build             |   1 +
>   tests/qtest/pnv-host-i2c-test.c     |  13 +-
>   tests/qtest/pnv-phb-test.c          | 235 ++++++++++++
>   tests/qtest/pnv-qtest-common.h      |  24 ++
>   tests/qtest/pnv-xive2-common.h      |   7 +-
>   14 files changed, 1102 insertions(+), 104 deletions(-)
>   create mode 100644 include/hw/pci-host/pnv_phb5.h
>   create mode 100644 tests/qtest/pnv-phb-test.c
>   create mode 100644 tests/qtest/pnv-qtest-common.h
>
Aditya Gupta Sept. 12, 2026, 12:43 p.m. UTC | #2 
On 26/08/31 07:29AM, Saif Abrar wrote:
> Hello,
> This patchset resolves the review comments for v5:
> https://lore.kernel.org/qemu-devel/20260617095058.652789-1-saif.abrar@linux.ibm.com/
> 
> Major updates include the following:
> - Separate reset and register read/write methods for PHB5.
> - PHB4 and PHB5 specific reset values.
> - Read/write logic for registers added and removed in PHB5.
> - General cleanups.
> 
> Tested with 'make check' and 'make check-functional-ppc64'.

Thanks for the patchset Saif ! Helps cleanup as well as add phb5
functionality nicely.

I was on vacation for past 2 weeks, couldn't review then.

With the minor non-code comments in patch #1, 2 and 6 fixed, the patch
series looks good to me !

Feel free to retain the rb:
Reviewed-by: Aditya Gupta <adityag@linux.ibm.com>

Thanks,
- Aditya G