From patchwork Thu Apr 20 20:43:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 753004 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3w8B7x3SfPz9s78 for ; Fri, 21 Apr 2017 06:59:41 +1000 (AEST) Received: from localhost ([::1]:55964 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d1JAw-0007vp-UX for incoming@patchwork.ozlabs.org; Thu, 20 Apr 2017 16:59:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51608) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d1J80-0005el-Uq for qemu-devel@nongnu.org; Thu, 20 Apr 2017 16:56:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d1J7x-0004zu-Ns for qemu-devel@nongnu.org; Thu, 20 Apr 2017 16:56:36 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:30618) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d1J7x-0004oL-EF; Thu, 20 Apr 2017 16:56:33 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 5169A7456BB; Thu, 20 Apr 2017 22:56:17 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id BDF3B7456B6; Thu, 20 Apr 2017 22:56:16 +0200 (CEST) Message-Id: In-Reply-To: References: From: BALATON Zoltan Date: Thu, 20 Apr 2017 22:43:46 +0200 To: qemu-devel@nongnu.org, qemu-trivial@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:738:2001:2001::2001 Subject: [Qemu-devel] [PATCH v5 02/13] sm501: Use defined constants instead of literal values where available X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Magnus Damm , Aurelien Jarno , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: BALATON Zoltan Reviewed-by: Peter Maydell --- v3: Fix initial value of misc_control register as Peter Maydell suggested Also use M_BYTE constant from cutils.h hw/display/sm501.c | 29 +++++++++++++++++++---------- hw/display/sm501_template.h | 2 +- 2 files changed, 20 insertions(+), 11 deletions(-) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 4f40dee..6b72964 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "qemu/cutils.h" #include "qapi/error.h" #include "qemu-common.h" #include "cpu.h" @@ -446,12 +447,12 @@ /* SM501 local memory size taken from "linux/drivers/mfd/sm501.c" */ static const uint32_t sm501_mem_local_size[] = { - [0] = 4 * 1024 * 1024, - [1] = 8 * 1024 * 1024, - [2] = 16 * 1024 * 1024, - [3] = 32 * 1024 * 1024, - [4] = 64 * 1024 * 1024, - [5] = 2 * 1024 * 1024, + [0] = 4 * M_BYTE, + [1] = 8 * M_BYTE, + [2] = 16 * M_BYTE, + [3] = 32 * M_BYTE, + [4] = 64 * M_BYTE, + [5] = 2 * M_BYTE, }; #define get_local_mem_size(s) sm501_mem_local_size[(s)->local_mem_size_index] @@ -555,7 +556,7 @@ static uint32_t get_local_mem_size_index(uint32_t size) static inline int is_hwc_enabled(SM501State *state, int crt) { uint32_t addr = crt ? state->dc_crt_hwc_addr : state->dc_panel_hwc_addr; - return addr & 0x80000000; + return addr & SM501_HWC_EN; } /** @@ -1411,9 +1412,17 @@ void sm501_init(MemoryRegion *address_space_mem, uint32_t base, s->local_mem_size_index = get_local_mem_size_index(local_mem_bytes); SM501_DPRINTF("local mem size=%x. index=%d\n", get_local_mem_size(s), s->local_mem_size_index); - s->system_control = 0x00100000; - s->misc_control = 0x00001000; /* assumes SH, active=low */ - s->dc_panel_control = 0x00010000; + s->system_control = 0x00100000; /* 2D engine FIFO empty */ + /* Bits 17 (SH), 7 (CDR), 6:5 (Test), 2:0 (Bus) are all supposed + * to be determined at reset by GPIO lines which set config bits. + * We hardwire them: + * SH = 0 : Hitachi Ready Polarity == Active Low + * CDR = 0 : do not reset clock divider + * TEST = 0 : Normal mode (not testing the silicon) + * BUS = 0 : Hitachi SH3/SH4 + */ + s->misc_control = SM501_MISC_DAC_POWER; + s->dc_panel_control = 0x00010000; /* FIFO level 3 */ s->dc_crt_control = 0x00010000; /* allocate local memory */ diff --git a/hw/display/sm501_template.h b/hw/display/sm501_template.h index aeeac5d..16e500b 100644 --- a/hw/display/sm501_template.h +++ b/hw/display/sm501_template.h @@ -108,7 +108,7 @@ static void glue(draw_hwc_line_, PIXEL_NAME)(SM501State *s, int crt, /* get hardware cursor pattern */ uint32_t cursor_addr = get_hwc_address(s, crt); assert(0 <= c_y && c_y < SM501_HWC_HEIGHT); - cursor_addr += 64 * c_y / 4; /* 4 pixels per byte */ + cursor_addr += SM501_HWC_WIDTH * c_y / 4; /* 4 pixels per byte */ cursor_addr += s->base; /* get cursor position */