diff mbox

[2/5] tcg-x86_64: Implement setcond.

Message ID bdecce6de6593693b46b66487b1f772d79744472.1261248772.git.rth@twiddle.net
State New
Headers show

Commit Message

Richard Henderson Dec. 19, 2009, 4:50 p.m. UTC
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/x86_64/tcg-target.c |   38 +++++++++++++++++++++++++++++++++-----
 1 files changed, 33 insertions(+), 5 deletions(-)

Comments

Aurelien Jarno Dec. 19, 2009, 11:11 p.m. UTC | #1
On Sat, Dec 19, 2009 at 08:50:19AM -0800, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <rth@twiddle.net>

Acked-by: Aurelien Jarno <aurelien@aurel32.net>

> ---
>  tcg/x86_64/tcg-target.c |   38 +++++++++++++++++++++++++++++++++-----
>  1 files changed, 33 insertions(+), 5 deletions(-)
> 
> diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c
> index 2339091..33dc452 100644
> --- a/tcg/x86_64/tcg-target.c
> +++ b/tcg/x86_64/tcg-target.c
> @@ -491,26 +491,42 @@ static void tcg_out_jxx(TCGContext *s, int opc, int label_index)
>      }
>  }
>  
> -static void tcg_out_brcond(TCGContext *s, int cond, 
> -                           TCGArg arg1, TCGArg arg2, int const_arg2,
> -                           int label_index, int rexw)
> +static void tcg_out_cmp(TCGContext *s, TCGArg arg1, TCGArg arg2,
> +                        int const_arg2, int rexw)
>  {
>      if (const_arg2) {
>          if (arg2 == 0) {
>              /* test r, r */
>              tcg_out_modrm(s, 0x85 | rexw, arg1, arg1);
>          } else {
> -            if (rexw)
> +            if (rexw) {
>                  tgen_arithi64(s, ARITH_CMP, arg1, arg2);
> -            else
> +            } else {
>                  tgen_arithi32(s, ARITH_CMP, arg1, arg2);
> +            }
>          }
>      } else {
>          tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3) | rexw, arg2, arg1);
>      }
> +}
> +
> +static void tcg_out_brcond(TCGContext *s, int cond,
> +                           TCGArg arg1, TCGArg arg2, int const_arg2,
> +                           int label_index, int rexw)
> +{
> +    tcg_out_cmp(s, arg1, arg2, const_arg2, rexw);
>      tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
>  }
>  
> +static void tcg_out_setcond(TCGContext *s, int cond, TCGArg dest,
> +                            TCGArg arg1, TCGArg arg2, int const_arg2, int rexw)
> +{
> +    tcg_out_cmp(s, arg1, arg2, const_arg2, rexw);
> +    /* setcc */
> +    tcg_out_modrm(s, 0x90 | tcg_cond_to_jcc[cond] | P_EXT | P_REXB, 0, dest);
> +    tgen_arithi32(s, ARITH_AND, dest, 0xff);
> +}
> +
>  #if defined(CONFIG_SOFTMMU)
>  
>  #include "../../softmmu_defs.h"
> @@ -1197,6 +1213,15 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
>          tcg_out_modrm(s, 0x8b, args[0], args[1]);
>          break;
>  
> +    case INDEX_op_setcond_i32:
> +        tcg_out_setcond(s, args[3], args[0], args[1], args[2],
> +                        const_args[2], 0);
> +        break;
> +    case INDEX_op_setcond_i64:
> +        tcg_out_setcond(s, args[3], args[0], args[1], args[2],
> +                        const_args[2], P_REXW);
> +        break;
> +
>      case INDEX_op_qemu_ld8u:
>          tcg_out_qemu_ld(s, args, 0);
>          break;
> @@ -1376,6 +1401,9 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
>      { INDEX_op_ext16u_i64, { "r", "r"} },
>      { INDEX_op_ext32u_i64, { "r", "r"} },
>  
> +    { INDEX_op_setcond_i32, { "r", "r", "ri" } },
> +    { INDEX_op_setcond_i64, { "r", "r", "re" } },
> +
>      { INDEX_op_qemu_ld8u, { "r", "L" } },
>      { INDEX_op_qemu_ld8s, { "r", "L" } },
>      { INDEX_op_qemu_ld16u, { "r", "L" } },
> -- 
> 1.6.5.2
> 
> 
> 
>
diff mbox

Patch

diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c
index 2339091..33dc452 100644
--- a/tcg/x86_64/tcg-target.c
+++ b/tcg/x86_64/tcg-target.c
@@ -491,26 +491,42 @@  static void tcg_out_jxx(TCGContext *s, int opc, int label_index)
     }
 }
 
-static void tcg_out_brcond(TCGContext *s, int cond, 
-                           TCGArg arg1, TCGArg arg2, int const_arg2,
-                           int label_index, int rexw)
+static void tcg_out_cmp(TCGContext *s, TCGArg arg1, TCGArg arg2,
+                        int const_arg2, int rexw)
 {
     if (const_arg2) {
         if (arg2 == 0) {
             /* test r, r */
             tcg_out_modrm(s, 0x85 | rexw, arg1, arg1);
         } else {
-            if (rexw)
+            if (rexw) {
                 tgen_arithi64(s, ARITH_CMP, arg1, arg2);
-            else
+            } else {
                 tgen_arithi32(s, ARITH_CMP, arg1, arg2);
+            }
         }
     } else {
         tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3) | rexw, arg2, arg1);
     }
+}
+
+static void tcg_out_brcond(TCGContext *s, int cond,
+                           TCGArg arg1, TCGArg arg2, int const_arg2,
+                           int label_index, int rexw)
+{
+    tcg_out_cmp(s, arg1, arg2, const_arg2, rexw);
     tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
 }
 
+static void tcg_out_setcond(TCGContext *s, int cond, TCGArg dest,
+                            TCGArg arg1, TCGArg arg2, int const_arg2, int rexw)
+{
+    tcg_out_cmp(s, arg1, arg2, const_arg2, rexw);
+    /* setcc */
+    tcg_out_modrm(s, 0x90 | tcg_cond_to_jcc[cond] | P_EXT | P_REXB, 0, dest);
+    tgen_arithi32(s, ARITH_AND, dest, 0xff);
+}
+
 #if defined(CONFIG_SOFTMMU)
 
 #include "../../softmmu_defs.h"
@@ -1197,6 +1213,15 @@  static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
         tcg_out_modrm(s, 0x8b, args[0], args[1]);
         break;
 
+    case INDEX_op_setcond_i32:
+        tcg_out_setcond(s, args[3], args[0], args[1], args[2],
+                        const_args[2], 0);
+        break;
+    case INDEX_op_setcond_i64:
+        tcg_out_setcond(s, args[3], args[0], args[1], args[2],
+                        const_args[2], P_REXW);
+        break;
+
     case INDEX_op_qemu_ld8u:
         tcg_out_qemu_ld(s, args, 0);
         break;
@@ -1376,6 +1401,9 @@  static const TCGTargetOpDef x86_64_op_defs[] = {
     { INDEX_op_ext16u_i64, { "r", "r"} },
     { INDEX_op_ext32u_i64, { "r", "r"} },
 
+    { INDEX_op_setcond_i32, { "r", "r", "ri" } },
+    { INDEX_op_setcond_i64, { "r", "r", "re" } },
+
     { INDEX_op_qemu_ld8u, { "r", "L" } },
     { INDEX_op_qemu_ld8s, { "r", "L" } },
     { INDEX_op_qemu_ld16u, { "r", "L" } },