diff mbox

[v2,3/7] softfloat: Convert `*_default_nan' variables into inline functions

Message ID alpine.DEB.1.10.1412121928210.19155@tp.orcam.me.uk
State New
Headers show

Commit Message

Maciej W. Rozycki Dec. 12, 2014, 7:34 p.m. UTC 
Mechanically replace `*_default_nan' variables with inline functions and 
convert references accordingly.  Use `__inline__' rather than `inline' 
so that the latter does not cause the definitions to become static as a 
result of macro expansion, the functions are best inlined when referred 
to from softfloat.c, but external copies must be also produced for 
external callers.

Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
---
Changes from v1:

- regenerate on top of the SoftFloat relicensing patch set.

qemu-softfloat-default-nan-func.diff

Comments

Leon Alrae Jan. 30, 2015, 2:09 p.m. UTC | #1 
On 12/12/2014 19:34, Maciej W. Rozycki wrote:
> Mechanically replace `*_default_nan' variables with inline functions and 
> convert references accordingly.  Use `__inline__' rather than `inline' 
> so that the latter does not cause the definitions to become static as a 
> result of macro expansion, the functions are best inlined when referred 
> to from softfloat.c, but external copies must be also produced for 
> external callers.
> 
> Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
> Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
<snip>
> Index: qemu-git-trunk/include/fpu/softfloat.h
> ===================================================================
> --- qemu-git-trunk.orig/include/fpu/softfloat.h	2014-12-11 18:15:02.000000000 +0000
> +++ qemu-git-trunk/include/fpu/softfloat.h	2014-12-11 18:18:00.918095644 +0000
> @@ -370,7 +370,7 @@ static inline int float16_is_any_nan(flo
>  /*----------------------------------------------------------------------------
>  | The pattern for a default generated half-precision NaN.
>  *----------------------------------------------------------------------------*/
> -extern const float16 float16_default_nan;
> +__inline__ float16 float16_default_nan(void);
>  
>  /*----------------------------------------------------------------------------
>  | Software IEC/IEEE single-precision conversion routines.
> @@ -482,7 +482,7 @@ static inline float32 float32_set_sign(f
>  /*----------------------------------------------------------------------------
>  | The pattern for a default generated single-precision NaN.
>  *----------------------------------------------------------------------------*/
> -extern const float32 float32_default_nan;
> +__inline__ float32 float32_default_nan(void);
>  
>  /*----------------------------------------------------------------------------
>  | Software IEC/IEEE double-precision conversion routines.
> @@ -594,7 +594,7 @@ static inline float64 float64_set_sign(f
>  /*----------------------------------------------------------------------------
>  | The pattern for a default generated double-precision NaN.
>  *----------------------------------------------------------------------------*/
> -extern const float64 float64_default_nan;
> +__inline__ float64 float64_default_nan(void);
>  
>  /*----------------------------------------------------------------------------
>  | Software IEC/IEEE extended double-precision conversion routines.
> @@ -679,7 +679,7 @@ static inline int floatx80_is_any_nan(fl
>  /*----------------------------------------------------------------------------
>  | The pattern for a default generated extended double-precision NaN.
>  *----------------------------------------------------------------------------*/
> -extern const floatx80 floatx80_default_nan;
> +__inline__ floatx80 floatx80_default_nan(void);
>  
>  /*----------------------------------------------------------------------------
>  | Software IEC/IEEE quadruple-precision conversion routines.
> @@ -760,6 +760,6 @@ static inline int float128_is_any_nan(fl
>  /*----------------------------------------------------------------------------
>  | The pattern for a default generated quadruple-precision NaN.
>  *----------------------------------------------------------------------------*/
> -extern const float128 float128_default_nan;
> +__inline__ float128 float128_default_nan(void);
>  

Unfortunately clang complains about it and eventually it won't link:

  CC    aarch64-softmmu/target-arm/helper-a64.o
In file included from /qemu/target-arm/helper-a64.c:20:
In file included from /qemu/target-arm/cpu.h:37:
In file included from /qemu/include/qemu-common.h:120:
In file included from /qemu/include/qemu/bswap.h:8:
/qemu/include/fpu/softfloat.h:485:20: warning: inline function
'float32_default_nan' is not defined [-Wundefined-inline]
__inline__ float32 float32_default_nan(void);
                   ^
/qemu/target-arm/helper-a64.c:345:19: note: used here
            nan = float32_default_nan();
                  ^
In file included from /qemu/target-arm/helper-a64.c:20:
In file included from /qemu/target-arm/cpu.h:37:
In file included from /qemu/include/qemu-common.h:120:
In file included from /qemu/include/qemu/bswap.h:8:
/qemu/include/fpu/softfloat.h:597:20: warning: inline function
'float64_default_nan' is not defined [-Wundefined-inline]
__inline__ float64 float64_default_nan(void);
                   ^
/qemu/target-arm/helper-a64.c:374:19: note: used here
            nan = float64_default_nan();
                  ^
2 warnings generated.
  CC    aarch64-softmmu/target-arm/gdbstub64.o
  CC    aarch64-softmmu/target-arm/crypto_helper.o
  GEN   trace/generated-helpers.c
  CC    aarch64-softmmu/trace/generated-helpers.o
  LINK  aarch64-softmmu/qemu-system-aarch64
fpu/softfloat.o: In function `commonNaNToFloat64':
/qemu/fpu/softfloat-specialize.h:796: undefined reference to
`float64_default_nan'
/qemu/fpu/softfloat-specialize.h:805: undefined reference to
`float64_default_nan'
fpu/softfloat.o: In function `commonNaNToFloatx80':
/qemu/fpu/softfloat-specialize.h:1007: undefined reference to
`floatx80_default_nan'
/qemu/fpu/softfloat-specialize.h:1014: undefined reference to
`floatx80_default_nan'
Maciej W. Rozycki Jan. 30, 2015, 4:02 p.m. UTC | #2 
On Fri, 30 Jan 2015, Leon Alrae wrote:

> > @@ -760,6 +760,6 @@ static inline int float128_is_any_nan(fl
> >  /*----------------------------------------------------------------------------
> >  | The pattern for a default generated quadruple-precision NaN.
> >  *----------------------------------------------------------------------------*/
> > -extern const float128 float128_default_nan;
> > +__inline__ float128 float128_default_nan(void);
> >  
> 
> Unfortunately clang complains about it and eventually it won't link:
> 
>   CC    aarch64-softmmu/target-arm/helper-a64.o
> In file included from /qemu/target-arm/helper-a64.c:20:
> In file included from /qemu/target-arm/cpu.h:37:
> In file included from /qemu/include/qemu-common.h:120:
> In file included from /qemu/include/qemu/bswap.h:8:
> /qemu/include/fpu/softfloat.h:485:20: warning: inline function
> 'float32_default_nan' is not defined [-Wundefined-inline]
> __inline__ float32 float32_default_nan(void);
>                    ^
> /qemu/target-arm/helper-a64.c:345:19: note: used here
>             nan = float32_default_nan();
>                   ^
> In file included from /qemu/target-arm/helper-a64.c:20:
> In file included from /qemu/target-arm/cpu.h:37:
> In file included from /qemu/include/qemu-common.h:120:
> In file included from /qemu/include/qemu/bswap.h:8:
> /qemu/include/fpu/softfloat.h:597:20: warning: inline function
> 'float64_default_nan' is not defined [-Wundefined-inline]
> __inline__ float64 float64_default_nan(void);
>                    ^
> /qemu/target-arm/helper-a64.c:374:19: note: used here
>             nan = float64_default_nan();
>                   ^
> 2 warnings generated.
>   CC    aarch64-softmmu/target-arm/gdbstub64.o
>   CC    aarch64-softmmu/target-arm/crypto_helper.o
>   GEN   trace/generated-helpers.c
>   CC    aarch64-softmmu/trace/generated-helpers.o
>   LINK  aarch64-softmmu/qemu-system-aarch64
> fpu/softfloat.o: In function `commonNaNToFloat64':
> /qemu/fpu/softfloat-specialize.h:796: undefined reference to
> `float64_default_nan'
> /qemu/fpu/softfloat-specialize.h:805: undefined reference to
> `float64_default_nan'
> fpu/softfloat.o: In function `commonNaNToFloatx80':
> /qemu/fpu/softfloat-specialize.h:1007: undefined reference to
> `floatx80_default_nan'
> /qemu/fpu/softfloat-specialize.h:1014: undefined reference to
> `floatx80_default_nan'

 Hmm, so perhaps my idea for a later improvement:

>  Eventually we might want to move the new inline functions into a
> separate header to be included from softfloat.h instead of softfloat.c,
> but let's make changes one step at a time.

will actually have to be made right away.  I suspect GCC is more liberal 
here due to its convoluted extern/static/inline semantics history.  
Sigh...

  Maciej
Peter Maydell Jan. 30, 2015, 4:55 p.m. UTC | #3 
On 30 January 2015 at 16:02, Maciej W. Rozycki <macro@linux-mips.org> wrote:
>  Hmm, so perhaps my idea for a later improvement:
>
>>  Eventually we might want to move the new inline functions into a
>> separate header to be included from softfloat.h instead of softfloat.c,
>> but let's make changes one step at a time.
>
> will actually have to be made right away.  I suspect GCC is more liberal
> here due to its convoluted extern/static/inline semantics history.
> Sigh...

I would suggest just using "static inline", as we do elsewhere
for little utility functions.

-- PMM
Maciej W. Rozycki Jan. 31, 2015, 11:56 a.m. UTC | #4 
On Fri, 30 Jan 2015, Peter Maydell wrote:

> >  Hmm, so perhaps my idea for a later improvement:
> >
> >>  Eventually we might want to move the new inline functions into a
> >> separate header to be included from softfloat.h instead of softfloat.c,
> >> but let's make changes one step at a time.
> >
> > will actually have to be made right away.  I suspect GCC is more liberal
> > here due to its convoluted extern/static/inline semantics history.
> > Sigh...
> 
> I would suggest just using "static inline", as we do elsewhere
> for little utility functions.

 Yes, that's exactly what they'd have to be moved into a separate header 
for.

  Maciej
Peter Maydell Jan. 31, 2015, 12:52 p.m. UTC | #5 
On 31 January 2015 at 11:56, Maciej W. Rozycki <macro@linux-mips.org> wrote:
> On Fri, 30 Jan 2015, Peter Maydell wrote:
>
>> >  Hmm, so perhaps my idea for a later improvement:
>> >
>> >>  Eventually we might want to move the new inline functions into a
>> >> separate header to be included from softfloat.h instead of softfloat.c,
>> >> but let's make changes one step at a time.
>> >
>> > will actually have to be made right away.  I suspect GCC is more liberal
>> > here due to its convoluted extern/static/inline semantics history.
>> > Sigh...
>>
>> I would suggest just using "static inline", as we do elsewhere
>> for little utility functions.
>
>  Yes, that's exactly what they'd have to be moved into a separate header
> for.

Why do they need to be moved into a different header to do this?
I must be missing something...

-- PMM
Maciej W. Rozycki Jan. 31, 2015, 2:58 p.m. UTC | #6 
On Sat, 31 Jan 2015, Peter Maydell wrote:

> >> >  Hmm, so perhaps my idea for a later improvement:
> >> >
> >> >>  Eventually we might want to move the new inline functions into a
> >> >> separate header to be included from softfloat.h instead of softfloat.c,
> >> >> but let's make changes one step at a time.
> >> >
> >> > will actually have to be made right away.  I suspect GCC is more liberal
> >> > here due to its convoluted extern/static/inline semantics history.
> >> > Sigh...
> >>
> >> I would suggest just using "static inline", as we do elsewhere
> >> for little utility functions.
> >
> >  Yes, that's exactly what they'd have to be moved into a separate header
> > for.
> 
> Why do they need to be moved into a different header to do this?
> I must be missing something...

 This is because fpu/softfloat-specialize.h is an implementation header 
private to SoftFloat and therefore such inline definitions won't be seen 
by users outside SoftFloat, such as target-mips/msa_helper.c.  And IMO 
they shouldn't be moved into include/fpu/softfloat.h itself as this header 
contains generic stuff and is supposed to have no TARGET_foo stuff, as 
observed by current usage and inferred from comments in fpu/softfloat.c.

 So ultimately I think the newly converted `*_default_nan' inline 
functions will need to go into include/fpu/softfloat-public-specialize.h 
or suchlike, which will be pulled from include/fpu/softfloat.h for general 
availability.

 Overall I think the whole arrangement in fpu/softfloat-specialize.h has a 
potential to being cleaned up by removing all the chains of #ifdef's and 
splitting the conditional bits into separate headers matching the current 
variants.  E.g. the presence of this construct:

#if defined(TARGET_SPARC)
const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
#elif SNAN_BIT_IS_ONE
const float64 float64_default_nan = const_float64(LIT64( 0x7FF7FFFFFFFFFFFF ));
#else
const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
#endif

asks for 4 independent headers defining the 4 bit pattern styles used by 
targets for symbolic FP data, one each -- perhaps even pulled indirectly 
via target headers rather than copying the chain of #ifdef's above around 
#include's from wherever they'll be pulled.

 Please correct me if I am wrong, but it appears to me possible right away 
by removing fpu/softfloat-specialize.h and instead creating individual 
target-*/softfloat-specialize.h headers that'll pull the right variant 
each target requires from a pool of templates made available in fpu/.  
Then include/fpu/softfloat.h could do the same for the public stuff (i.e. 
these NaN bits concerned here) placed similarly in include/fpu/.

 FWIW,

  Maciej
Richard Henderson Feb. 3, 2015, 3:43 p.m. UTC | #7 
On 01/30/2015 08:02 AM, Maciej W. Rozycki wrote:
>  Hmm, so perhaps my idea for a later improvement:
> 
>> >  Eventually we might want to move the new inline functions into a
>> > separate header to be included from softfloat.h instead of softfloat.c,
>> > but let's make changes one step at a time.
> will actually have to be made right away.  I suspect GCC is more liberal 
> here due to its convoluted extern/static/inline semantics history.  
> Sigh...

GCC 5 is moving to -std=gnu11 as default, and so will have the same problem.


r~
diff mbox

Patch

Index: qemu-git-trunk/fpu/softfloat-specialize.h
===================================================================
--- qemu-git-trunk.orig/fpu/softfloat-specialize.h	2014-12-11 18:17:59.418972577 +0000
+++ qemu-git-trunk/fpu/softfloat-specialize.h	2014-12-11 18:18:00.918095644 +0000
@@ -99,69 +99,74 @@  this code that are retained.
 /*----------------------------------------------------------------------------
 | The pattern for a default generated half-precision NaN.
 *----------------------------------------------------------------------------*/
+inline float16 float16_default_nan(void)
+{
 #if defined(TARGET_ARM)
-const float16 float16_default_nan = const_float16(0x7E00);
+    return const_float16(0x7E00);
 #elif SNAN_BIT_IS_ONE
-const float16 float16_default_nan = const_float16(0x7DFF);
+    return const_float16(0x7DFF);
 #else
-const float16 float16_default_nan = const_float16(0xFE00);
+    return const_float16(0xFE00);
 #endif
+}
 
 /*----------------------------------------------------------------------------
 | The pattern for a default generated single-precision NaN.
 *----------------------------------------------------------------------------*/
+inline float32 float32_default_nan(void)
+{
 #if defined(TARGET_SPARC)
-const float32 float32_default_nan = const_float32(0x7FFFFFFF);
+    return const_float32(0x7FFFFFFF);
 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) || \
       defined(TARGET_XTENSA)
-const float32 float32_default_nan = const_float32(0x7FC00000);
+    return const_float32(0x7FC00000);
 #elif SNAN_BIT_IS_ONE
-const float32 float32_default_nan = const_float32(0x7FBFFFFF);
+    return const_float32(0x7FBFFFFF);
 #else
-const float32 float32_default_nan = const_float32(0xFFC00000);
+    return const_float32(0xFFC00000);
 #endif
+}
 
 /*----------------------------------------------------------------------------
 | The pattern for a default generated double-precision NaN.
 *----------------------------------------------------------------------------*/
+inline float64 float64_default_nan(void)
+{
 #if defined(TARGET_SPARC)
-const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF ));
+    return const_float64(LIT64(0x7FFFFFFFFFFFFFFF));
 #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
-const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 ));
+    return const_float64(LIT64(0x7FF8000000000000));
 #elif SNAN_BIT_IS_ONE
-const float64 float64_default_nan = const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
+    return const_float64(LIT64(0x7FF7FFFFFFFFFFFF));
 #else
-const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 ));
+    return const_float64(LIT64(0xFFF8000000000000));
 #endif
+}
 
 /*----------------------------------------------------------------------------
 | The pattern for a default generated extended double-precision NaN.
 *----------------------------------------------------------------------------*/
+inline floatx80 floatx80_default_nan(void)
+{
 #if SNAN_BIT_IS_ONE
-#define floatx80_default_nan_high 0x7FFF
-#define floatx80_default_nan_low  LIT64(0xBFFFFFFFFFFFFFFF)
+    return make_floatx80(0x7FFF, LIT64(0xBFFFFFFFFFFFFFFF));
 #else
-#define floatx80_default_nan_high 0xFFFF
-#define floatx80_default_nan_low  LIT64( 0xC000000000000000 )
+    return make_floatx80(0xFFFF, LIT64(0xC000000000000000));
 #endif
-
-const floatx80 floatx80_default_nan
-    = make_floatx80_init(floatx80_default_nan_high, floatx80_default_nan_low);
+}
 
 /*----------------------------------------------------------------------------
 | The pattern for a default generated quadruple-precision NaN.  The `high' and
 | `low' values hold the most- and least-significant bits, respectively.
 *----------------------------------------------------------------------------*/
+inline float128 float128_default_nan(void)
+{
 #if SNAN_BIT_IS_ONE
-#define float128_default_nan_high LIT64(0x7FFF7FFFFFFFFFFF)
-#define float128_default_nan_low  LIT64(0xFFFFFFFFFFFFFFFF)
+    return make_float128(LIT64(0x7FFF7FFFFFFFFFFF), LIT64(0xFFFFFFFFFFFFFFFF));
 #else
-#define float128_default_nan_high LIT64( 0xFFFF800000000000 )
-#define float128_default_nan_low  LIT64( 0x0000000000000000 )
+    return make_float128(LIT64(0xFFFF800000000000), LIT64(0x0000000000000000));
 #endif
-
-const float128 float128_default_nan
-    = make_float128_init(float128_default_nan_high, float128_default_nan_low);
+}
 
 /*----------------------------------------------------------------------------
 | Raises the exceptions specified by `flags'.  Floating-point traps can be
@@ -234,7 +239,7 @@  float16 float16_maybe_silence_nan(float1
     if (float16_is_signaling_nan(a_)) {
 #if SNAN_BIT_IS_ONE
 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
-        return float16_default_nan;
+        return float16_default_nan();
 #  else
 #    error Rules for silencing a signaling NaN are target-specific
 #  endif
@@ -274,14 +279,14 @@  static float16 commonNaNToFloat16(common
     uint16_t mantissa = a.high>>54;
 
     if (STATUS(default_nan_mode)) {
-        return float16_default_nan;
+        return float16_default_nan();
     }
 
     if (mantissa) {
         return make_float16(((((uint16_t) a.sign) << 15)
                              | (0x1F << 10) | mantissa));
     } else {
-        return float16_default_nan;
+        return float16_default_nan();
     }
 }
 
@@ -337,7 +342,7 @@  float32 float32_maybe_silence_nan( float
     if (float32_is_signaling_nan(a_)) {
 #if SNAN_BIT_IS_ONE
 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
-        return float32_default_nan;
+        return float32_default_nan();
 #  else
 #    error Rules for silencing a signaling NaN are target-specific
 #  endif
@@ -377,14 +382,14 @@  static float32 commonNaNToFloat32( commo
     uint32_t mantissa = a.high>>41;
 
     if ( STATUS(default_nan_mode) ) {
-        return float32_default_nan;
+        return float32_default_nan();
     }
 
     if ( mantissa )
         return make_float32(
             ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
     else
-        return float32_default_nan;
+        return float32_default_nan();
 }
 
 /*----------------------------------------------------------------------------
@@ -624,7 +629,7 @@  static float32 propagateFloat32NaN( floa
     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 
     if ( STATUS(default_nan_mode) )
-        return float32_default_nan;
+        return float32_default_nan();
 
     if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
         aIsLargerSignificand = 0;
@@ -677,7 +682,7 @@  static float32 propagateFloat32MulAddNaN
         /* Note that this check is after pickNaNMulAdd so that function
          * has an opportunity to set the Invalid flag.
          */
-        return float32_default_nan;
+        return float32_default_nan();
     }
 
     switch (which) {
@@ -689,7 +694,7 @@  static float32 propagateFloat32MulAddNaN
         return float32_maybe_silence_nan(c);
     case 3:
     default:
-        return float32_default_nan;
+        return float32_default_nan();
     }
 }
 
@@ -748,7 +753,7 @@  float64 float64_maybe_silence_nan( float
     if (float64_is_signaling_nan(a_)) {
 #if SNAN_BIT_IS_ONE
 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
-        return float64_default_nan;
+        return float64_default_nan();
 #  else
 #    error Rules for silencing a signaling NaN are target-specific
 #  endif
@@ -788,7 +793,7 @@  static float64 commonNaNToFloat64( commo
     uint64_t mantissa = a.high>>12;
 
     if ( STATUS(default_nan_mode) ) {
-        return float64_default_nan;
+        return float64_default_nan();
     }
 
     if ( mantissa )
@@ -797,7 +802,7 @@  static float64 commonNaNToFloat64( commo
             | LIT64( 0x7FF0000000000000 )
             | ( a.high>>12 ));
     else
-        return float64_default_nan;
+        return float64_default_nan();
 }
 
 /*----------------------------------------------------------------------------
@@ -822,7 +827,7 @@  static float64 propagateFloat64NaN( floa
     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 
     if ( STATUS(default_nan_mode) )
-        return float64_default_nan;
+        return float64_default_nan();
 
     if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
         aIsLargerSignificand = 0;
@@ -875,7 +880,7 @@  static float64 propagateFloat64MulAddNaN
         /* Note that this check is after pickNaNMulAdd so that function
          * has an opportunity to set the Invalid flag.
          */
-        return float64_default_nan;
+        return float64_default_nan();
     }
 
     switch (which) {
@@ -887,7 +892,7 @@  static float64 propagateFloat64MulAddNaN
         return float64_maybe_silence_nan(c);
     case 3:
     default:
-        return float64_default_nan;
+        return float64_default_nan();
     }
 }
 
@@ -956,8 +961,7 @@  floatx80 floatx80_maybe_silence_nan( flo
     if (floatx80_is_signaling_nan(a)) {
 #if SNAN_BIT_IS_ONE
 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
-        a.low = floatx80_default_nan_low;
-        a.high = floatx80_default_nan_high;
+        a = floatx80_default_nan();
 #  else
 #    error Rules for silencing a signaling NaN are target-specific
 #  endif
@@ -982,8 +986,7 @@  static commonNaNT floatx80ToCommonNaN( f
     if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
     /* Replace a Pseudo NaN with a default NaN.  */
     if (!(a.low >> 63)) {
-        a.low = floatx80_default_nan_low;
-        a.high = floatx80_default_nan_high;
+        a = floatx80_default_nan();
     }
     z.sign = a.high >> 15;
     z.low = 0;
@@ -1001,17 +1004,14 @@  static floatx80 commonNaNToFloatx80( com
     floatx80 z;
 
     if ( STATUS(default_nan_mode) ) {
-        z.low = floatx80_default_nan_low;
-        z.high = floatx80_default_nan_high;
-        return z;
+        return floatx80_default_nan();
     }
 
     if (a.high >> 1) {
         z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
         z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
     } else {
-        z.low = floatx80_default_nan_low;
-        z.high = floatx80_default_nan_high;
+        z = floatx80_default_nan();
     }
 
     return z;
@@ -1036,9 +1036,7 @@  static floatx80 propagateFloatx80NaN( fl
     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 
     if ( STATUS(default_nan_mode) ) {
-        a.low = floatx80_default_nan_low;
-        a.high = floatx80_default_nan_high;
-        return a;
+        return floatx80_default_nan();
     }
 
     if (a.low < b.low) {
@@ -1114,8 +1112,7 @@  float128 float128_maybe_silence_nan( flo
     if (float128_is_signaling_nan(a)) {
 #if SNAN_BIT_IS_ONE
 #  if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
-        a.low = float128_default_nan_low;
-        a.high = float128_default_nan_high;
+        a = float128_default_nan();
 #  else
 #    error Rules for silencing a signaling NaN are target-specific
 #  endif
@@ -1153,9 +1150,7 @@  static float128 commonNaNToFloat128( com
     float128 z;
 
     if ( STATUS(default_nan_mode) ) {
-        z.low = float128_default_nan_low;
-        z.high = float128_default_nan_high;
-        return z;
+        return float128_default_nan();
     }
 
     shift128Right( a.high, a.low, 16, &z.high, &z.low );
@@ -1182,9 +1177,7 @@  static float128 propagateFloat128NaN( fl
     if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
 
     if ( STATUS(default_nan_mode) ) {
-        a.low = float128_default_nan_low;
-        a.high = float128_default_nan_high;
-        return a;
+        return float128_default_nan();
     }
 
     if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
Index: qemu-git-trunk/fpu/softfloat.c
===================================================================
--- qemu-git-trunk.orig/fpu/softfloat.c	2014-12-11 18:17:58.418989075 +0000
+++ qemu-git-trunk/fpu/softfloat.c	2014-12-11 18:18:00.918095644 +0000
@@ -2035,7 +2035,7 @@  static float32 subFloat32Sigs( float32 a
     if ( aExp == 0xFF ) {
         if ( aSig | bSig ) return propagateFloat32NaN( a, b STATUS_VAR );
         float_raise( float_flag_invalid STATUS_VAR);
-        return float32_default_nan;
+        return float32_default_nan();
     }
     if ( aExp == 0 ) {
         aExp = 1;
@@ -2160,7 +2160,7 @@  float32 float32_mul( float32 a, float32 
         }
         if ( ( bExp | bSig ) == 0 ) {
             float_raise( float_flag_invalid STATUS_VAR);
-            return float32_default_nan;
+            return float32_default_nan();
         }
         return packFloat32( zSign, 0xFF, 0 );
     }
@@ -2168,7 +2168,7 @@  float32 float32_mul( float32 a, float32 
         if ( bSig ) return propagateFloat32NaN( a, b STATUS_VAR );
         if ( ( aExp | aSig ) == 0 ) {
             float_raise( float_flag_invalid STATUS_VAR);
-            return float32_default_nan;
+            return float32_default_nan();
         }
         return packFloat32( zSign, 0xFF, 0 );
     }
@@ -2219,7 +2219,7 @@  float32 float32_div( float32 a, float32 
         if ( bExp == 0xFF ) {
             if ( bSig ) return propagateFloat32NaN( a, b STATUS_VAR );
             float_raise( float_flag_invalid STATUS_VAR);
-            return float32_default_nan;
+            return float32_default_nan();
         }
         return packFloat32( zSign, 0xFF, 0 );
     }
@@ -2231,7 +2231,7 @@  float32 float32_div( float32 a, float32 
         if ( bSig == 0 ) {
             if ( ( aExp | aSig ) == 0 ) {
                 float_raise( float_flag_invalid STATUS_VAR);
-                return float32_default_nan;
+                return float32_default_nan();
             }
             float_raise( float_flag_divbyzero STATUS_VAR);
             return packFloat32( zSign, 0xFF, 0 );
@@ -2285,7 +2285,7 @@  float32 float32_rem( float32 a, float32 
             return propagateFloat32NaN( a, b STATUS_VAR );
         }
         float_raise( float_flag_invalid STATUS_VAR);
-        return float32_default_nan;
+        return float32_default_nan();
     }
     if ( bExp == 0xFF ) {
         if ( bSig ) return propagateFloat32NaN( a, b STATUS_VAR );
@@ -2294,7 +2294,7 @@  float32 float32_rem( float32 a, float32 
     if ( bExp == 0 ) {
         if ( bSig == 0 ) {
             float_raise( float_flag_invalid STATUS_VAR);
-            return float32_default_nan;
+            return float32_default_nan();
         }
         normalizeFloat32Subnormal( bSig, &bExp, &bSig );
     }
@@ -2409,7 +2409,7 @@  float32 float32_muladd(float32 a, float3
 
     if (infzero) {
         float_raise(float_flag_invalid STATUS_VAR);
-        return float32_default_nan;
+        return float32_default_nan();
     }
 
     if (flags & float_muladd_negate_c) {
@@ -2430,7 +2430,7 @@  float32 float32_muladd(float32 a, float3
         if (pInf && (pSign ^ cSign)) {
             /* addition of opposite-signed infinities => InvalidOperation */
             float_raise(float_flag_invalid STATUS_VAR);
-            return float32_default_nan;
+            return float32_default_nan();
         }
         /* Otherwise generate an infinity of the same sign */
         return packFloat32(cSign ^ signflip, 0xff, 0);
@@ -2604,12 +2604,12 @@  float32 float32_sqrt( float32 a STATUS_P
         if ( aSig ) return propagateFloat32NaN( a, float32_zero STATUS_VAR );
         if ( ! aSign ) return a;
         float_raise( float_flag_invalid STATUS_VAR);
-        return float32_default_nan;
+        return float32_default_nan();
     }
     if ( aSign ) {
         if ( ( aExp | aSig ) == 0 ) return a;
         float_raise( float_flag_invalid STATUS_VAR);
-        return float32_default_nan;
+        return float32_default_nan();
     }
     if ( aExp == 0 ) {
         if ( aSig == 0 ) return float32_zero;
@@ -2740,7 +2740,7 @@  float32 float32_log2( float32 a STATUS_P
     }
     if ( aSign ) {
         float_raise( float_flag_invalid STATUS_VAR);
-        return float32_default_nan;
+        return float32_default_nan();
     }
     if ( aExp == 0xFF ) {
         if ( aSig ) return propagateFloat32NaN( a, float32_zero STATUS_VAR );
@@ -3796,7 +3796,7 @@  static float64 subFloat64Sigs( float64 a
     if ( aExp == 0x7FF ) {
         if ( aSig | bSig ) return propagateFloat64NaN( a, b STATUS_VAR );
         float_raise( float_flag_invalid STATUS_VAR);
-        return float64_default_nan;
+        return float64_default_nan();
     }
     if ( aExp == 0 ) {
         aExp = 1;
@@ -3919,7 +3919,7 @@  float64 float64_mul( float64 a, float64 
         }
         if ( ( bExp | bSig ) == 0 ) {
             float_raise( float_flag_invalid STATUS_VAR);
-            return float64_default_nan;
+            return float64_default_nan();
         }
         return packFloat64( zSign, 0x7FF, 0 );
     }
@@ -3927,7 +3927,7 @@  float64 float64_mul( float64 a, float64 
         if ( bSig ) return propagateFloat64NaN( a, b STATUS_VAR );
         if ( ( aExp | aSig ) == 0 ) {
             float_raise( float_flag_invalid STATUS_VAR);
-            return float64_default_nan;
+            return float64_default_nan();
         }
         return packFloat64( zSign, 0x7FF, 0 );
     }
@@ -3980,7 +3980,7 @@  float64 float64_div( float64 a, float64 
         if ( bExp == 0x7FF ) {
             if ( bSig ) return propagateFloat64NaN( a, b STATUS_VAR );
             float_raise( float_flag_invalid STATUS_VAR);
-            return float64_default_nan;
+            return float64_default_nan();
         }
         return packFloat64( zSign, 0x7FF, 0 );
     }
@@ -3992,7 +3992,7 @@  float64 float64_div( float64 a, float64 
         if ( bSig == 0 ) {
             if ( ( aExp | aSig ) == 0 ) {
                 float_raise( float_flag_invalid STATUS_VAR);
-                return float64_default_nan;
+                return float64_default_nan();
             }
             float_raise( float_flag_divbyzero STATUS_VAR);
             return packFloat64( zSign, 0x7FF, 0 );
@@ -4050,7 +4050,7 @@  float64 float64_rem( float64 a, float64 
             return propagateFloat64NaN( a, b STATUS_VAR );
         }
         float_raise( float_flag_invalid STATUS_VAR);
-        return float64_default_nan;
+        return float64_default_nan();
     }
     if ( bExp == 0x7FF ) {
         if ( bSig ) return propagateFloat64NaN( a, b STATUS_VAR );
@@ -4059,7 +4059,7 @@  float64 float64_rem( float64 a, float64 
     if ( bExp == 0 ) {
         if ( bSig == 0 ) {
             float_raise( float_flag_invalid STATUS_VAR);
-            return float64_default_nan;
+            return float64_default_nan();
         }
         normalizeFloat64Subnormal( bSig, &bExp, &bSig );
     }
@@ -4160,7 +4160,7 @@  float64 float64_muladd(float64 a, float6
 
     if (infzero) {
         float_raise(float_flag_invalid STATUS_VAR);
-        return float64_default_nan;
+        return float64_default_nan();
     }
 
     if (flags & float_muladd_negate_c) {
@@ -4181,7 +4181,7 @@  float64 float64_muladd(float64 a, float6
         if (pInf && (pSign ^ cSign)) {
             /* addition of opposite-signed infinities => InvalidOperation */
             float_raise(float_flag_invalid STATUS_VAR);
-            return float64_default_nan;
+            return float64_default_nan();
         }
         /* Otherwise generate an infinity of the same sign */
         return packFloat64(cSign ^ signflip, 0x7ff, 0);
@@ -4377,12 +4377,12 @@  float64 float64_sqrt( float64 a STATUS_P
         if ( aSig ) return propagateFloat64NaN( a, a STATUS_VAR );
         if ( ! aSign ) return a;
         float_raise( float_flag_invalid STATUS_VAR);
-        return float64_default_nan;
+        return float64_default_nan();
     }
     if ( aSign ) {
         if ( ( aExp | aSig ) == 0 ) return a;
         float_raise( float_flag_invalid STATUS_VAR);
-        return float64_default_nan;
+        return float64_default_nan();
     }
     if ( aExp == 0 ) {
         if ( aSig == 0 ) return float64_zero;
@@ -4430,7 +4430,7 @@  float64 float64_log2( float64 a STATUS_P
     }
     if ( aSign ) {
         float_raise( float_flag_invalid STATUS_VAR);
-        return float64_default_nan;
+        return float64_default_nan();
     }
     if ( aExp == 0x7FF ) {
         if ( aSig ) return propagateFloat64NaN( a, float64_zero STATUS_VAR );
@@ -5083,7 +5083,6 @@  static floatx80 subFloatx80Sigs( floatx8
     int32 aExp, bExp, zExp;
     uint64_t aSig, bSig, zSig0, zSig1;
     int32 expDiff;
-    floatx80 z;
 
     aSig = extractFloatx80Frac( a );
     aExp = extractFloatx80Exp( a );
@@ -5097,9 +5096,7 @@  static floatx80 subFloatx80Sigs( floatx8
             return propagateFloatx80NaN( a, b STATUS_VAR );
         }
         float_raise( float_flag_invalid STATUS_VAR);
-        z.low = floatx80_default_nan_low;
-        z.high = floatx80_default_nan_high;
-        return z;
+        return floatx80_default_nan();
     }
     if ( aExp == 0 ) {
         aExp = 1;
@@ -5191,7 +5188,6 @@  floatx80 floatx80_mul( floatx80 a, float
     flag aSign, bSign, zSign;
     int32 aExp, bExp, zExp;
     uint64_t aSig, bSig, zSig0, zSig1;
-    floatx80 z;
 
     aSig = extractFloatx80Frac( a );
     aExp = extractFloatx80Exp( a );
@@ -5213,9 +5209,7 @@  floatx80 floatx80_mul( floatx80 a, float
         if ( ( aExp | aSig ) == 0 ) {
  invalid:
             float_raise( float_flag_invalid STATUS_VAR);
-            z.low = floatx80_default_nan_low;
-            z.high = floatx80_default_nan_high;
-            return z;
+            return floatx80_default_nan();
         }
         return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
     }
@@ -5251,7 +5245,6 @@  floatx80 floatx80_div( floatx80 a, float
     int32 aExp, bExp, zExp;
     uint64_t aSig, bSig, zSig0, zSig1;
     uint64_t rem0, rem1, rem2, term0, term1, term2;
-    floatx80 z;
 
     aSig = extractFloatx80Frac( a );
     aExp = extractFloatx80Exp( a );
@@ -5277,9 +5270,7 @@  floatx80 floatx80_div( floatx80 a, float
             if ( ( aExp | aSig ) == 0 ) {
  invalid:
                 float_raise( float_flag_invalid STATUS_VAR);
-                z.low = floatx80_default_nan_low;
-                z.high = floatx80_default_nan_high;
-                return z;
+                return floatx80_default_nan();
             }
             float_raise( float_flag_divbyzero STATUS_VAR);
             return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
@@ -5331,7 +5322,6 @@  floatx80 floatx80_rem( floatx80 a, float
     int32 aExp, bExp, expDiff;
     uint64_t aSig0, aSig1, bSig;
     uint64_t q, term0, term1, alternateASig0, alternateASig1;
-    floatx80 z;
 
     aSig0 = extractFloatx80Frac( a );
     aExp = extractFloatx80Exp( a );
@@ -5353,9 +5343,7 @@  floatx80 floatx80_rem( floatx80 a, float
         if ( bSig == 0 ) {
  invalid:
             float_raise( float_flag_invalid STATUS_VAR);
-            z.low = floatx80_default_nan_low;
-            z.high = floatx80_default_nan_high;
-            return z;
+            return floatx80_default_nan();
         }
         normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
     }
@@ -5427,7 +5415,6 @@  floatx80 floatx80_sqrt( floatx80 a STATU
     int32 aExp, zExp;
     uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0;
     uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
-    floatx80 z;
 
     aSig0 = extractFloatx80Frac( a );
     aExp = extractFloatx80Exp( a );
@@ -5441,9 +5428,7 @@  floatx80 floatx80_sqrt( floatx80 a STATU
         if ( ( aExp | aSig0 ) == 0 ) return a;
  invalid:
         float_raise( float_flag_invalid STATUS_VAR);
-        z.low = floatx80_default_nan_low;
-        z.high = floatx80_default_nan_high;
-        return z;
+        return floatx80_default_nan();
     }
     if ( aExp == 0 ) {
         if ( aSig0 == 0 ) return packFloatx80( 0, 0, 0 );
@@ -6249,7 +6234,6 @@  static float128 subFloat128Sigs( float12
     int32 aExp, bExp, zExp;
     uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
     int32 expDiff;
-    float128 z;
 
     aSig1 = extractFloat128Frac1( a );
     aSig0 = extractFloat128Frac0( a );
@@ -6267,9 +6251,7 @@  static float128 subFloat128Sigs( float12
             return propagateFloat128NaN( a, b STATUS_VAR );
         }
         float_raise( float_flag_invalid STATUS_VAR);
-        z.low = float128_default_nan_low;
-        z.high = float128_default_nan_high;
-        return z;
+        return float128_default_nan();
     }
     if ( aExp == 0 ) {
         aExp = 1;
@@ -6373,7 +6355,6 @@  float128 float128_mul( float128 a, float
     flag aSign, bSign, zSign;
     int32 aExp, bExp, zExp;
     uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
-    float128 z;
 
     aSig1 = extractFloat128Frac1( a );
     aSig0 = extractFloat128Frac0( a );
@@ -6397,9 +6378,7 @@  float128 float128_mul( float128 a, float
         if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
  invalid:
             float_raise( float_flag_invalid STATUS_VAR);
-            z.low = float128_default_nan_low;
-            z.high = float128_default_nan_high;
-            return z;
+            return float128_default_nan();
         }
         return packFloat128( zSign, 0x7FFF, 0, 0 );
     }
@@ -6438,7 +6417,6 @@  float128 float128_div( float128 a, float
     int32 aExp, bExp, zExp;
     uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
     uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
-    float128 z;
 
     aSig1 = extractFloat128Frac1( a );
     aSig0 = extractFloat128Frac0( a );
@@ -6466,9 +6444,7 @@  float128 float128_div( float128 a, float
             if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
  invalid:
                 float_raise( float_flag_invalid STATUS_VAR);
-                z.low = float128_default_nan_low;
-                z.high = float128_default_nan_high;
-                return z;
+                return float128_default_nan();
             }
             float_raise( float_flag_divbyzero STATUS_VAR);
             return packFloat128( zSign, 0x7FFF, 0, 0 );
@@ -6523,7 +6499,6 @@  float128 float128_rem( float128 a, float
     uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
     uint64_t allZero, alternateASig0, alternateASig1, sigMean1;
     int64_t sigMean0;
-    float128 z;
 
     aSig1 = extractFloat128Frac1( a );
     aSig0 = extractFloat128Frac0( a );
@@ -6547,9 +6522,7 @@  float128 float128_rem( float128 a, float
         if ( ( bSig0 | bSig1 ) == 0 ) {
  invalid:
             float_raise( float_flag_invalid STATUS_VAR);
-            z.low = float128_default_nan_low;
-            z.high = float128_default_nan_high;
-            return z;
+            return float128_default_nan();
         }
         normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
     }
@@ -6631,7 +6604,6 @@  float128 float128_sqrt( float128 a STATU
     int32 aExp, zExp;
     uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
     uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
-    float128 z;
 
     aSig1 = extractFloat128Frac1( a );
     aSig0 = extractFloat128Frac0( a );
@@ -6646,9 +6618,7 @@  float128 float128_sqrt( float128 a STATU
         if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;
  invalid:
         float_raise( float_flag_invalid STATUS_VAR);
-        z.low = float128_default_nan_low;
-        z.high = float128_default_nan_high;
-        return z;
+        return float128_default_nan();
     }
     if ( aExp == 0 ) {
         if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 );
Index: qemu-git-trunk/include/fpu/softfloat.h
===================================================================
--- qemu-git-trunk.orig/include/fpu/softfloat.h	2014-12-11 18:15:02.000000000 +0000
+++ qemu-git-trunk/include/fpu/softfloat.h	2014-12-11 18:18:00.918095644 +0000
@@ -370,7 +370,7 @@  static inline int float16_is_any_nan(flo
 /*----------------------------------------------------------------------------
 | The pattern for a default generated half-precision NaN.
 *----------------------------------------------------------------------------*/
-extern const float16 float16_default_nan;
+__inline__ float16 float16_default_nan(void);
 
 /*----------------------------------------------------------------------------
 | Software IEC/IEEE single-precision conversion routines.
@@ -482,7 +482,7 @@  static inline float32 float32_set_sign(f
 /*----------------------------------------------------------------------------
 | The pattern for a default generated single-precision NaN.
 *----------------------------------------------------------------------------*/
-extern const float32 float32_default_nan;
+__inline__ float32 float32_default_nan(void);
 
 /*----------------------------------------------------------------------------
 | Software IEC/IEEE double-precision conversion routines.
@@ -594,7 +594,7 @@  static inline float64 float64_set_sign(f
 /*----------------------------------------------------------------------------
 | The pattern for a default generated double-precision NaN.
 *----------------------------------------------------------------------------*/
-extern const float64 float64_default_nan;
+__inline__ float64 float64_default_nan(void);
 
 /*----------------------------------------------------------------------------
 | Software IEC/IEEE extended double-precision conversion routines.
@@ -679,7 +679,7 @@  static inline int floatx80_is_any_nan(fl
 /*----------------------------------------------------------------------------
 | The pattern for a default generated extended double-precision NaN.
 *----------------------------------------------------------------------------*/
-extern const floatx80 floatx80_default_nan;
+__inline__ floatx80 floatx80_default_nan(void);
 
 /*----------------------------------------------------------------------------
 | Software IEC/IEEE quadruple-precision conversion routines.
@@ -760,6 +760,6 @@  static inline int float128_is_any_nan(fl
 /*----------------------------------------------------------------------------
 | The pattern for a default generated quadruple-precision NaN.
 *----------------------------------------------------------------------------*/
-extern const float128 float128_default_nan;
+__inline__ float128 float128_default_nan(void);
 
 #endif /* !SOFTFLOAT_H */
Index: qemu-git-trunk/target-arm/helper-a64.c
===================================================================
--- qemu-git-trunk.orig/target-arm/helper-a64.c	2014-12-10 20:51:35.000000000 +0000
+++ qemu-git-trunk/target-arm/helper-a64.c	2014-12-11 18:18:00.918095644 +0000
@@ -342,7 +342,7 @@  float32 HELPER(frecpx_f32)(float32 a, vo
             nan = float32_maybe_silence_nan(a);
         }
         if (fpst->default_nan_mode) {
-            nan = float32_default_nan;
+            nan = float32_default_nan();
         }
         return nan;
     }
@@ -371,7 +371,7 @@  float64 HELPER(frecpx_f64)(float64 a, vo
             nan = float64_maybe_silence_nan(a);
         }
         if (fpst->default_nan_mode) {
-            nan = float64_default_nan;
+            nan = float64_default_nan();
         }
         return nan;
     }
Index: qemu-git-trunk/target-arm/helper.c
===================================================================
--- qemu-git-trunk.orig/target-arm/helper.c	2014-12-10 20:51:35.000000000 +0000
+++ qemu-git-trunk/target-arm/helper.c	2014-12-11 18:18:00.918095644 +0000
@@ -5836,7 +5836,7 @@  float32 HELPER(recpe_f32)(float32 input,
             nan = float32_maybe_silence_nan(f32);
         }
         if (fpst->default_nan_mode) {
-            nan =  float32_default_nan;
+            nan = float32_default_nan();
         }
         return nan;
     } else if (float32_is_infinity(f32)) {
@@ -5890,7 +5890,7 @@  float64 HELPER(recpe_f64)(float64 input,
             nan = float64_maybe_silence_nan(f64);
         }
         if (fpst->default_nan_mode) {
-            nan =  float64_default_nan;
+            nan = float64_default_nan();
         }
         return nan;
     } else if (float64_is_infinity(f64)) {
@@ -5997,7 +5997,7 @@  float32 HELPER(rsqrte_f32)(float32 input
             nan = float32_maybe_silence_nan(f32);
         }
         if (s->default_nan_mode) {
-            nan =  float32_default_nan;
+            nan = float32_default_nan();
         }
         return nan;
     } else if (float32_is_zero(f32)) {
@@ -6005,7 +6005,7 @@  float32 HELPER(rsqrte_f32)(float32 input
         return float32_set_sign(float32_infinity, float32_is_neg(f32));
     } else if (float32_is_neg(f32)) {
         float_raise(float_flag_invalid, s);
-        return float32_default_nan;
+        return float32_default_nan();
     } else if (float32_is_infinity(f32)) {
         return float32_zero;
     }
@@ -6061,7 +6061,7 @@  float64 HELPER(rsqrte_f64)(float64 input
             nan = float64_maybe_silence_nan(f64);
         }
         if (s->default_nan_mode) {
-            nan =  float64_default_nan;
+            nan = float64_default_nan();
         }
         return nan;
     } else if (float64_is_zero(f64)) {
@@ -6069,7 +6069,7 @@  float64 HELPER(rsqrte_f64)(float64 input
         return float64_set_sign(float64_infinity, float64_is_neg(f64));
     } else if (float64_is_neg(f64)) {
         float_raise(float_flag_invalid, s);
-        return float64_default_nan;
+        return float64_default_nan();
     } else if (float64_is_infinity(f64)) {
         return float64_zero;
     }
Index: qemu-git-trunk/target-mips/msa_helper.c
===================================================================
--- qemu-git-trunk.orig/target-mips/msa_helper.c	2014-12-11 16:30:29.000000000 +0000
+++ qemu-git-trunk/target-mips/msa_helper.c	2014-12-11 18:18:00.918095644 +0000
@@ -1503,11 +1503,11 @@  MSA_UNOP_DF(pcnt)
 #define FLOAT_ONE32 make_float32(0x3f8 << 20)
 #define FLOAT_ONE64 make_float64(0x3ffULL << 52)
 
-#define FLOAT_SNAN16 (float16_default_nan ^ 0x0220)
+#define FLOAT_SNAN16 (float16_default_nan() ^ 0x0220)
         /* 0x7c20 */
-#define FLOAT_SNAN32 (float32_default_nan ^ 0x00400020)
+#define FLOAT_SNAN32 (float32_default_nan() ^ 0x00400020)
         /* 0x7f800020 */
-#define FLOAT_SNAN64 (float64_default_nan ^ 0x0008000000000020ULL)
+#define FLOAT_SNAN64 (float64_default_nan() ^ 0x0008000000000020ULL)
         /* 0x7ff0000000000020 */
 
 static inline void clear_msacsr_cause(CPUMIPSState *env)